DS26303L-75+ Maxim Integrated Products, DS26303L-75+ Datasheet - Page 71

• Manufacturer Part Number: DS26303L-75+
• Description: IC LIU E1/T1/J1 3.3V 144-ELQFP
• Manufacturer: Maxim Integrated Products
• Type: Line Interface Units (LIUs)r

Specifications of DS26303L-75+

• Number Of Drivers/receivers: 8/8
• Protocol: T1/E1/J1
• Voltage - Supply: 3.135 V ~ 3.465 V
• Mounting Type: Surface Mount
• Package / Case: 144-LQFP Exposed Pad, 144-eLQFP, 144-HLQFP
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

DS26303: 3.3V, T1/E1/J1, Short-Haul, Octal Line Interface Unit
Figure 6-13. Repetitive Pattern Synchronization State Diagram
Sync
1 bit error
Verify
Match
Pattern Matches
6.9.3.3
Receive Pattern Monitoring
Receive pattern monitoring monitors the incoming data stream for both an OOS condition and bit errors and counts
the incoming bits. An out-of-synchronization (OOS) condition is declared when the synchronization state machine
is not in the sync state. An OOS condition is terminated when the synchronization state machine is in the sync
state.
Bit errors are determined by comparing the incoming data stream bit to the receive pattern generator output. If they
do not match, a bit error is declared, and the bit error and bit counts are incremented. If they match, only the bit
count is incremented. The bit count and bit-error count are not incremented when an OOS condition exists.
6.9.4 Transmit Pattern Generation
Pattern generation generates the outgoing test pattern and passes it onto error insertion. The transmit pattern
generator is a 32-bit shift register that shifts data from the least significant bit (LSB) or bit 1 to the most significant
n
y
bit (MSB) or bit 32. The input to bit 1 is the feedback. For a PRBS pattern (generating polynomial x
+ x
+ 1), the
feedback is an XOR of bit n and bit y. For a repetitive pattern (length n), the feedback is bit n. The values for n and
y are individually programmable (1 to 32). The output of the receive pattern generator is the feedback. If QRSS is
enabled, the feedback is an XOR of bits 17 and 20, and the output will be forced to one if the next 14 bits are all 0s.
QRSS is programmable (on or off). For PRBS and QRSS patterns, the feedback will be forced to 1 if bits 1 to 31
are all 0s. When a new pattern is loaded, the pattern generator is loaded with a seed/pattern value before pattern
n
generation starts. The seed/pattern value is programmable (0 – 2
– 1).
6.9.4.1
Transmit Error Insertion
Error insertion inserts errors into the outgoing pattern data stream. Errors are inserted one at a time or at a rate of
n
one out of every 10
bits. The value of n is programmable (1 to 7 or off). Single bit-error insertion can be initiated
from the microprocessor interface, or by the manual error-insertion input (TMEI). The method of single error
insertion is programmable (register or input). If pattern inversion is enabled, the data stream is inverted before the
overhead/stuff bits are inserted. Pattern inversion is programmable (on or off).
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