DS26303LN-75+ Maxim Integrated Products, DS26303LN-75+ Datasheet - Page 24

IC LIU E1/T1/J1 3.3V 144-ELQFP

DS26303LN-75+

Manufacturer Part Number
DS26303LN-75+
Description
IC LIU E1/T1/J1 3.3V 144-ELQFP
Manufacturer
Maxim Integrated Products
Type
Line Interface Units (LIUs)r
Datasheet

Specifications of DS26303LN-75+

Number Of Drivers/receivers
8/8
Protocol
T1/E1/J1
Voltage - Supply
3.135 V ~ 3.465 V
Mounting Type
Surface Mount
Package / Case
144-LQFP Exposed Pad, 144-eLQFP, 144-HLQFP
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
5 REGISTERS
Five address bits are used to control the settings of the registers. AD[4:0] are used in both the parallel
nonmultiplexed mode and in multiplexed mode. In serial mode, the address is input serially on SDI. The register
space contains control for channels 1 to 8 from address 00 hex to 1F hex. The
pointer to access the different banks of registers. This register must be set to AA hex for access of the secondary
bank of registers, 01 hex for access to the individual LIU bank of registers, and 02 hex for access of the BERT
bank of registers. The primary bank of registers is accessed upon reset of this register to 00 hex.
Table 5-1. Primary Register Set
Identification
Analog Loopback Configuration
Remote Loopback Configuration
Transmit All-Ones Enable
Loss-of-Signal Status
Driver Fault Monitor Status
Loss-of-Signal Interrupt Enable
Driver Fault Monitor Interrupt Enable
Loss-of-Signal Interrupt Status
Driver Fault Monitor Interrupt Status
Software Reset
G.772 Monitor Control
Digital Loopback Configuration
LOS/AIS Criteria Selection
Automatic Transmit All-Ones Select
Global Configuration
Template Select Transceiver
Template Select
Output-Enable Bar
Alarm Indication Signal Status
AIS Interrupt Enable
AIS Interrupt Status
Reserved
Address Pointer for Bank Selection
REGISTER
ATAOS
LASCS
DFMIE
DFMIS
NAME
LOSIE
LOSIS
DFMS
ADDP
RLBC
TAOE
LOSS
DLBC
ALBC
AISIE
AISIS
SWR
GMC
OEB
TST
AIS
GC
TS
ID
DS26303: 3.3V, T1/E1/J1, Short-Haul, Octal Line Interface Unit
24 of 101
16–1E
HEX
0C
0D
0A
0B
0E
0F
1F
00
01
02
03
04
05
06
07
08
09
10
11
12
13
14
15
A[7:0] (HEX)
INTERFACE
PARALLEL
xxx10110–
xxx00000
xxx00001
xxx00010
xxx00011
xxx00100
xxx00101
xxx00110
xxx00111
xxx01000
xxx01001
xxx01010
xxx01011
xxx01100
xxx01101
xxx01110
xxx01111
xxx10000
xxx10001
xxx10010
xxx10011
xxx10100
xxx10101
xxx11110
xxx11111
ADDRESS
ADDP
A[7:1] (HEX)
INTERFACE
xx10110–
xx00000
xx00001
xx00010
xx00011
xx00100
xx00101
xx00110
xx00111
xx01000
xx01001
xx01010
xx01011
xx01100
xx01101
xx01110
xx01111
xx10000
xx10001
xx10010
xx10011
xx10100
xx10101
xx11110
xx11111
SERIAL
(1F) register is used as a
RW
RW
RW
RW
RW
RW
RW
RW
RW
RW
RW
RW
RW
RW
RW
RW
RW
RW
W
R
R
R
R
R

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