IC AMP XDSL LINE DRIVER 20-PSOP

AD8016ARRZ

Manufacturer Part NumberAD8016ARRZ
DescriptionIC AMP XDSL LINE DRIVER 20-PSOP
ManufacturerAnalog Devices Inc
TypeDriver
AD8016ARRZ datasheet
 


Specifications of AD8016ARRZ

Number Of Drivers/receivers2/0ProtocolxDSL
Voltage - Supply3 V ~ 13 VMounting TypeSurface Mount
Package / Case20-PowerSOP Exposed Top PadPower Supply RequirementDual
Package TypePSOP-IISlew Rate1000V/us
Pin Count20Lead Free Status / RoHS StatusLead free / RoHS Compliant
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a
FEATURES
xDSL Line Driver that Features Full ADSL CO (Central
Office) Performance on
12 V Supplies
Low Power Operation
5 V to
12 V Voltage Supply
12.5 mA/Amp (Typ) Total Supply Current
Power Reduced Keep Alive Current of 4.5 mA/Amp
High Output Voltage and Current Drive
I
= 600 mA
OUT
40 V p-p Differential Output Voltage R
V
=
12 V
S
Low Single-Tone Distortion
–75 dBc @ 1 MHz SFDR, R
= 100
L
MTPR = –75 dBc, 26 kHz to 1.1 MHz, Z
P
= 20.4 dBm
LINE
High Speed
78 MHz Bandwidth (–3 dB), G = +5
40 MHz Gain Flatness
1000 V/ s Slew Rates
PRODUCT DESCRIPTION
The AD8016 high output current dual amplifier is designed
for the line drive interface in Digital Subscriber Line systems
such as ADSL, HDSL2, and proprietary xDSL systems. The
drivers are capable, in full-bias operation, of providing 24.4 dBm
output power into low resistance loads, enough to power a
20.4 dBm line, including hybrid insertion loss.
–75dBc
549.3 550.3 551.3 552.3 553.3 554.3 555.3 556.3 557.3 558.3 559.3
FREQUENCY (kHz)
Figure 1. Multitone Power Ratio; V
Output Power into 100 Ω , Downstream
REV. B
Information furnished by Analog Devices is believed to be accurate and
reliable. However, no responsibility is assumed by Analog Devices for its
use, nor for any infringements of patents or other rights of third parties that
may result from its use. No license is granted by implication or otherwise
under any patent or patent rights of Analog Devices. Trademarks and
registered trademarks are the property of their respective owners.
Low Power, High Output Current
20-Lead PSOP3
+V1
1
V
1
2
OUT
V
1
3
INN
V
1
4
INP
NC
5
NC
6
= 50
,
L
NC
7
PWDN0
8
DGND
9
, V
= 2 V p-p
O
= 100
,
–V1
10
LINE
NC = NO CONNECT
The AD8016 is available in a low cost 24-lead SO-Batwing,
a thermally enhanced 20-lead PSOP3, and a 28-lead TSSOP-EP
with an exposed lead frame (ePAD). Operating from ±12 V
supplies, the AD8016 requires only 1.5 W of total power
dissipation (refer to the Power Dissipation section for details)
while driving 20.4 dBm of power downstream using the
xDSL hybrid in Figure 33a and Figure 33b. Two digital bits
(PWDN0, PWDN1) allow the driver to be capable of full perfor-
mance, an output keep-alive state, or two intermediate bias
states. The keep-alive state biases the output transistors enough
to provide a low impedance at the amplifier outputs for back
= ± 12 V, 20.4 dBm
S
termination.
The low power dissipation, high output current, high output voltage
swing, flexible power-down, and robust thermal packaging enable
the AD8016 to be used as the Central Office (CO) terminal driver
in ADSL, HDSL2, VDSL, and proprietary xDSL systems.
One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A.
Tel: 781/329-4700
Fax: 781/326-8703
xDSL Line Driver
AD8016
PIN CONFIGURATION
24-Lead Batwing
(RB-24)
(RP-20)
+V2
+V1
20
1
V
1
2
19
V
2
OUT
OUT
V
1
3
INN
18
V
2
INN
+
+ –
+
+ –
V
1
4
INP
17
V
2
INP
AGND
5
16
NC
AGND
6
NC
15
AGND
7
AD8016
AD8016
14
NC
AGND
8
13
PWDN1
PWDN0
9
12
BIAS
DGND
10
–V2
11
–V1
11
NC
12
NC = NO CONNECT
28-Lead TSSOP-EP
(RE-28-1)
NC
NC
28
1
NC
NC
2
27
NC
NC
26
3
+V
2
NC
4
25
IN
–V
2
24
PWDN1
5
IN
V
2
BIAS
6
23
OUT
22
–V2
+V2
7
AD8016ARE
–V1
+V1
8
21
V
1
20
DGND
9
OUT
–V
1
NC
10
19
IN
+V
1
PWDN0
11
18
IN
NC
12
17
NC
NC
NC
13
16
NC
14
15
NC
NC = NO CONNECT
www.analog.com
© 2003 Analog Devices, Inc. All rights reserved.
24
+V2
V
2
23
OUT
V
2
22
INN
V
2
21
INP
AGND
20
AGND
19
AGND
18
AGND
17
PWDN1
16
BIAS
15
–V2
14
NC
13

AD8016ARRZ Summary of contents

  • Page 1

    FEATURES xDSL Line Driver that Features Full ADSL CO (Central Office) Performance Supplies Low Power Operation Voltage Supply 12.5 mA/Amp (Typ) Total Supply Current Power Reduced Keep Alive Current of 4.5 ...

  • Page 2

    AD8016–SPECIFICATIONS Parameter DYNAMIC PERFORMANCE –3 dB Bandwidth Bandwidth for 0.1 dB Flatness Large Signal Bandwidth Peaking Slew Rate Rise and Fall Time Settling Time Input Overdrive Recovery Time NOISE/DISTORTION PERFORMANCE Distortion, Single-Ended Second Harmonic Third Harmonic Multitone Power Ratio* IMD ...

  • Page 3

    C, V SPECIFICATIONS T MAX Parameter DYNAMIC PERFORMANCE –3 dB Bandwidth Bandwidth for 0.1 dB Flatness Large Signal Bandwidth Peaking Slew Rate Rise and Fall Time Settling Time Input Overdrive Recovery Time NOISE/DISTORTION PERFORMANCE Distortion, Single-Ended Second Harmonic ...

  • Page 4

    AD8016 ABSOLUTE MAXIMUM RATINGS Supply Voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 26.4 V ...

  • Page 5

    V IN 49.9 0.1 F 0.1 F Figure 3. Single-Ended Test Circuit 100mV OUT V = 20mV IN TIME (100ns/DIV) Figure 4. 100 mV Step Response + Ω ...

  • Page 6

    AD8016 – 499 F – + p-p O –50 –60 –70 –80 –90 –100 –110 0.01 0.1 1 FREQUENCY (MHz) Figure 9. Distortion vs. Frequency; Second Harmonic, = ± ...

  • Page 7

    R = 499 F – –40 –45 (0,0) –50 (0,1) –55 –60 –65 –70 –75 –80 0 100 200 300 PEAK OUTPUT CURRENT (mA) Figure 15. Distortion vs. Peak Output Current; Second = ± ...

  • Page 8

    AD8016 3 0 – 40mV p-p IN – 100 –9 L –12 –15 –18 –21 –24 – FREQUENCY (MHz) Figure 21. Frequency Response PWDN1, PWDN0 Codes ...

  • Page 9

    NOISE NOISE 100 1k 10k FREQUENCY (MHz) Figure 27. Noise vs. Frequency +2mV (–0.1%) 0 –2mV (–0.1 OUT V OUT – ...

  • Page 10

    AD8016 V OUT –100 0 100 200 300 400 500 TIME (ns) Figure 33a. Overload Recovery 100 Ω + OUT –100 0 100 200 300 ...

  • Page 11

    THEORY OF OPERATION The AD8016 is a current feedback amplifier with high (500 mA) output current capability. With a current feedback amplifier, the current into the inverting input is the feedback signal and the open-loop behavior is that of a ...

  • Page 12

    AD8016 BIAS pin (I ) and the supply current (I BIAS down I is less than 1 mA total. Alternatively, an external pull- Q down resistor to ground or a current sink attached to the BIAS pin can be used ...

  • Page 13

    The point on the curve indicating maximum dynamic headroom is achieved when the differential driver delivers both the maximum voltage and current while maintaining the lowest possible distortion. Below this point, the driver has reserve current-driving capability and ...

  • Page 14

    AD8016 one can use symmetry to simplify the computation for a dc input signal. = × × + × where the peak output voltage of an amplifier. O This formula ...

  • Page 15

    EXPERIMENTAL RESULTS The experimental data suggests that for both packages, and a PCB as small as 4.7 square inches, reasonable junction tempera- tures can be maintained even in the absence of air flow. The graph in Figure 42 shows junction ...

  • Page 16

    AD8016 Figure 45. DMT Signal Generator Schematic –16– REV. B ...

  • Page 17

    TP10 TP5 AGND3,4 R11 R13 JP6 R23 1 JP5 AGND3,4,5 R14 S6 R16 R15 C10 TP11 TP4 ...

  • Page 18

    AD8016 LAYOUT AD8016ARB-EVAL Figure 47. Assembly Figure 48. Layer 1 Figure 49. Power/Ground Plane Figure 50. Layer 1 Figure 51. Silkscreen Bottom –18– REV. B ...

  • Page 19

    ALP – EVALUATION BOARD – BILL OF MATERIALS Quantity Description 10 µ Size Tantalum Chip Capacitor 5 0.1 µ 1206 Size Ceramic Chip Capacitor 10 49.9 Ω 1% 1/8 W 1206 Size Chip Resistor 2 100 ...

  • Page 20

    AD8016 20-Lead Power SOIC, Thermally Enhanced Package [PSOP3] 11.00 BSC 3.60 3.35 3.10 SEATING PLANE 28-Lead Thin Shrink Small Outline With Exposed Pad [TSSOP-EP PIN 1 1.20 MAX 0.15 0.00 Revision History Location 11/03—Data Sheet changed from REV. ...