LMX3162VBH National Semiconductor, LMX3162VBH Datasheet

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LMX3162VBH

Manufacturer Part Number
LMX3162VBH
Description
IC TXRX RADIO SNG CHIP 48-LQFP
Manufacturer
National Semiconductor
Type
Transceiverr
Datasheet

Specifications of LMX3162VBH

Voltage - Supply
3 V ~ 5.5 V
Mounting Type
Surface Mount
Package / Case
48-LQFP
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
Number Of Drivers/receivers
-
Protocol
-
Other names
*LMX3162VBH

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
LMX3162VBHX
Manufacturer:
NS
Quantity:
32 400
Part Number:
LMX3162VBHX
Manufacturer:
Texas Instruments
Quantity:
10 000
Part Number:
LMX3162VBHX
Manufacturer:
NS/国半
Quantity:
20 000
© 2000 National Semiconductor Corporation
LMX3162
Single Chip Radio Transceiver
General Description
The LMX3162 Single Chip Radio Transceiver is a monolithic,
integrated radio transceiver optimized for use in ISM 2.45
GHz wireless systems. It is fabricated using National’s ABiC
V BiCMOS process (f
The LMX3162 contains phase locked loop (PLL), transmit
and receive functions. The 1.3 GHz PLL is shared between
transmit and receive sections. The transmitter includes a fre-
quency doubler, and a high frequency buffer. The receiver
consists of a 2.5 GHz low noise mixer, an intermediate fre-
quency (IF) amplifier, a high gain limiting amplifier, a fre-
quency discriminator, a received signal strength indicator
(RSSI), and an analog DC compensation loop. The PLL,
doubler, and buffers can be used to implement open loop
modulation along with an external VCO and loop filter. The
circuit features on-chip voltage regulation to allow supply
voltages ranging from 3.0V to 5.5V. Two additional voltage
regulators provide a stable supply source to external dis-
crete stages in the Tx and Rx chains.
The IF amplifier, high gain limiting amplifier, and discrimina-
tor are optimized for 110 MHz operation, with a total IF gain
of 85 dB. The single conversion receiver architecture pro-
vides a low cost, high performance solution for communica-
tions systems. The RSSI output may be used for channel
quality monitoring.
Block Diagram
MICROWIRE
TRI-STATE
®
is a registered trademark of National Semiconductor Corporation.
is a trademark of National Semiconductor Corporation.
T
= 18 GHz).
DS100929
The Single Chip Radio Transceiver is available in a 48-pin
7mm X 7mm X 1.4mm PQFP surface mount plastic pack-
age.
Features
n Single chip solution for ISM 2.45 GHz RF transceiver
n System RF sensitivity to −93 dBm; RSSI sensitivity to
n Two regulated voltage outputs for discrete amplifiers
n High gain (85 dB) intermediate frequency strip
n Allows unregulated 3.0V–5.5V supply voltage
n Power down mode for increased current savings
n System noise figure 6.5 dB (typ)
Applications
n ISM 2.45 GHz frequency band wireless systems
n Personal wireless communications (PCS/PCN)
n Wireless local area networks (WLANs)
n Other wireless communications systems
−100 dBm
DS100929-1
PRELIMINARY
www.national.com
March 2000

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LMX3162VBH Summary of contents

Page 1

... Block Diagram MICROWIRE is a trademark of National Semiconductor Corporation. ™ TRI-STATE ® registered trademark of National Semiconductor Corporation. © 2000 National Semiconductor Corporation The Single Chip Radio Transceiver is available in a 48-pin 7mm X 7mm X 1.4mm PQFP surface mount plastic pack- age. Features n Single chip solution for ISM 2.45 GHz RF transceiver n System RF sensitivity to − ...

Page 2

... Power supply for CMOS section of PLL and CC ESD bussing. 2 MIXER O IF output from the mixer. OUT 3 V — Power supply for mixer section GND — Ground input to the mixer GND — Ground. www.national.com Top View Order Number LMX3162VBH or LMX3162VBHX See NS Package Number VBH48A Description 2 DS100929-2 ...

Page 3

Pin Descriptions (Continued) Pin No. Pin Name I — Regulated power supply for external PA gain REG stage — Power supply for analog sections of PLL and CC doubler. 9 GND — Ground ...

Page 4

Pin Descriptions (Continued) Pin No. Pin Name I/O 21 OUT 0 O Programmable CMOS output. Refer to Function Register Programming Description section for details PD/OUT 1 I/O Receiver power down control input or programmable CMOS output. Refer to ...

Page 5

Pin Descriptions (Continued) Pin No. Pin Name I COMP I Input to DC compensation circuit DISC O Demodulated output of discriminator. OUT 34 GND — Ground — Power supply for the discriminator circuit. CC ...

Page 6

Pin Descriptions (Continued) Pin No. Pin Name I input to IF amplifier — Regulated power supply for external LNA REG stages. www.national.com Description 6 ...

Page 7

Absolute Maximum Ratings Power Supply Voltage ( Voltage on Any Pin with GND = Storage Temperature Range ( Lead Temp. (solder, 4 sec)( Electrical Characteristics The following specifications ...

Page 8

Electrical Characteristics The following specifications are guaranteed for V Symbol Parameter RSSI (Note 11) RSSI Output Voltage out Slope RSSI Dynamic Range DC COMPENSATION CIRCUIT V Input Offset Voltage OS V Input/Output Voltage Swing I/O R Sample and Hold Resistor ...

Page 9

Electrical Characteristics Note 15: Tested environment. Note 16: The matching network used on pin LIM Note 17: The optimum load as seen by the TX OUT pin should be between 50 and 100 ohms. Typical Performance Characteristics ...

Page 10

Typical Performance Characteristics Charge Pump Current vs D Voltage V =3.6V, 25˚ Mixer OIP3 vs F Power IN Mixer Output Power vs Mixer Input Power www.national.com (Continued) Charge Pump Current vs D Voltage, V =3.0V, 25˚ ...

Page 11

Typical Performance Characteristics SSB Mixer Noise Figure vs RF Frequency IN TX Power Out vs F Power IN AC Timing Characteristics Serial Data Input Timing TEST CONDITIONS: The Serial Data Input Timing is tested using a symmetrical waveform around V ...

Page 12

Serial Data Input Timing Symbol Parameter MICROWIRE Interface ™ t Data to Clock Set Up Time CS t Data to Clock Hold Time CH t Clock Pulse Width High CWH t Clock Pulse Width Low CWL t Clock to Load ...

Page 13

Swallow Counter Divide Ratio (A-Counter) Note: Divide ratio must be from 0 to 63, and B must be Programmable Counter Divide Ratio (B-Counter) Divide Ratio 127 Note: Divide ratio must be from 3 to 127, and ...

Page 14

Receiver Functional Description Note 18: The receiver can be powered down, either by hardware through the Rx PD pin software through the programming of F6 bit in the F-Latch. The power down control method is determined by the ...

Page 15

Function Register Programming Description (F-Latch) Mode Control Mode Control Description Bit F1 Prescaler modules select. F2 Phase detector polarity used to reverse the polarity of the phase detector according to the VCO characteristics. F3 Charge pump current gain ...

Page 16

Typical Application www.national.com 16 DS100929-7 ...

Page 17

Loop Filter Design Consideration Loop Gain Equations A linear control system model of the phase feedback for a PLL in the locked state is shown in Figure 2 . The open loop gain is the product of the phase comparator ...

Page 18

... National does not assume any responsibility for use of any circuitry described, no circuit patent licenses are implied and National reserves the right at any time without notice to change said circuitry and specifications. inches (millimeters) unless otherwise noted For Tape and Reel (2500 Units per Reel) Order Number LMX3162VBH or LMX3162VBHX NS Package Number VBH48A 2. A critical component is any component of a life ...

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