ST62T62CN6 STMicroelectronics, ST62T62CN6 Datasheet - Page 6

Microcontrollers (MCU) OTP EPROM 2K No Intf

ST62T62CN6

Manufacturer Part Number
ST62T62CN6
Description
Microcontrollers (MCU) OTP EPROM 2K No Intf
Manufacturer
STMicroelectronics
Datasheet

Specifications of ST62T62CN6

Processor Series
ST62T6x
Core
ST6
Data Bus Width
8 bit
Program Memory Type
EPROM
Program Memory Size
1836 B
Data Ram Size
128 B
Interface Type
SPI, UART
Maximum Clock Frequency
8 MHz
Number Of Programmable I/os
9
Number Of Timers
2
Operating Supply Voltage
3 V to 6 V
Maximum Operating Temperature
+ 85 C
Mounting Style
SMD/SMT
Package / Case
SSOP-16
Development Tools By Supplier
ST62GP-EMU2, ST62E2XC-EPB/110, ST62E6XC-EPB/US, STREALIZER-II
Minimum Operating Temperature
- 40 C
On-chip Adc
8 bit
Lead Free Status / Rohs Status
 Details

Available stocks

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Part Number:
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Manufacturer:
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ST62T62CN6TR
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Quantity:
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ST62T52C ST62T62C/E62C
1.2 PIN DESCRIPTIONS
V
these two pins. V
V
OSCin and OSCout. These pins are internally
connected to the on-chip oscillator circuit. A quartz
crystal, a ceramic resonator or an external clock
signal can be connected between these two pins.
The OSCin pin is the input pin, the OSCout pin is
the output pin.
RESET. The active-low RESET pin is used to re-
start the microcontroller.
TEST/V
mal operation. If TEST pin is connected to a
+12.5V level during the reset phase, the
EPROM/OTP programming Mode is entered.
NMI. The NMI pin provides the capability for asyn-
chronous interruption, by applying an external non
maskable interrupt to the MCU. The NMI input is
falling edge sensitive. It is provided with an on-chip
pullup resistor (if option has been enabled), and
Schmitt trigger characteristics.
PA4-PA5. These 2 lines are organized as one I/O
port (A). Each line may be configured under soft-
ware control as inputs with or without internal pull-
up resistors, interrupt generating inputs with pull-
up resistors, open-drain or push-pull outputs, ana-
log inputs for the A/D converter.
PB0, PB2-PB3, PB6-PB7. These 5 lines are or-
ganized as one I/O port (B). Each line may be con-
figured under software control as inputs with or
without internal pull-up resistors, interrupt generat-
ing inputs with pull-up resistors, open-drain or
push-pull outputs. PB6/ARTIMin and PB7/ARTI-
6/78
DD
SS
is the ground connection.
and V
PP
. The TEST must be held at V
SS
. Power is supplied to the MCU via
DD
is the power connection and
SS
for nor-
Mout are either Port B I/O bits or the Input and
Output pins of the ARTimer.
Reset state of PB2-PB3 pins can be defined by op-
tion either with pull-up or high impedance.
PB0, PB2-PB3, PB6-PB7 scan also sink 30mA for
direct LED driving.
PC2-PC3. These 2 lines are organized as one I/O
port (C). Each line may be configured under soft-
ware control as input with or without internal pull-
up resistor, interrupt generating input with pull-up
resistor, analog input for the A/D converter, open-
drain or push-pull output.
Figure 2. ST62T52C, E62C and T62C Pin
Configuration
ARTIMout/PB7
ARTIMin/PB6
V
PP
/TEST
PB0
PB3
PB2
V
V
SS
DD
1
2
3
4
5
6
7
8
14
16
13
15
12
10
11
9
OSCout
RESET
PA5/Ain
PA4/Ain
PC3/Ain
OSCin
PC2/Ain
NMI

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