IS43DR16320B-25DBL

Manufacturer Part NumberIS43DR16320B-25DBL
ManufacturerISSI, Integrated Silicon Solution Inc
IS43DR16320B-25DBL datasheet
 

Specifications of IS43DR16320B-25DBL

Lead Free Status / Rohs StatusCompliant  
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IS43/46DR86400B, IS43/46DR16320B
Package Ball-out and Description
DDR2 SDRAM (64Mx8) 60-ball BGA Ball-out (Top-View) (10.00 mm X 10.50 mm Body, 0.8 mm pitch)
Symbol
Description
CK, CK#
Input clocks
CKE
Clock enable
CS#
Chip Select
RAS#,CAS#,WE#
Command control pins
A[13:0]
Address
BA[1:0]
Bank Address
DQ[7:0]
I/O
DQS, DQS#
Data Strobe
RDQS, RDQS#
Redundant Data Strobe
DM
Input data mask
VDD
Supply voltage
VSS
Ground
VDDQ
DQ power supply
VSSQ
DQ ground
VREF
Reference voltage
VDDL
DLL power supply
VSSDL
DLL ground
ODT
On Die Termination Enable
NC
No connect
Integrated Silicon Solution, Inc. – www.issi.com –
Rev. E, 01/17/2011
Notes:
1. Pins B3 and A2 have identical capacitance as pins B7
and A8.
2. For a read, when enabled, strobe pair RDQS & RDQS#
are identical in function and timing to strobe pair DQS &
DQS# and input masking function is disabled.
3. The function of DM or RDQS/RDQS# are enabled by
EMRS command.
4. VDDL and VSSDL are power and ground for the DLL. It
is recommended that they are isolated on the device
from VDD, VDDQ, VSS, and VSSQ.
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