UDA1380TTN2 NXP Semiconductors, UDA1380TTN2 Datasheet
UDA1380TTN2
Specifications of UDA1380TTN2
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UDA1380TTN2 Summary of contents
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DATA SHEET UDA1380 Stereo audio coder-decoder for MD, CD and MP3 Product specification Supersedes data of 2003 Apr 04 INTEGRATED CIRCUITS 2004 Apr 22 ...
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... NXP Semiconductors Stereo audio coder-decoder for MD, CD and MP3 CONTENTS 1 FEATURES 1.1 General 1.2 Multiple format data input interface 1.3 Multiple format data output interface 1.4 ADC front-end features 1.5 DAC features 2 APPLICATIONS 3 GENERAL DESCRIPTION 4 QUICK REFERENCE DATA 5 ORDERING INFORMATION 6 BLOCK DIAGRAM ...
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... NXP Semiconductors Stereo audio coder-decoder for MD, CD and MP3 1 FEATURES 1.1 General • 2.4 to 3.6 V power supply • tolerant digital inputs (at 2.7 to 3.6 V power supply) • 24-bit data path for Analog-to-Digital Converter (ADC) and Digital-to-Analog Converter (DAC) • Selectable control via L3-bus microcontroller interface ...
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... NXP Semiconductors Stereo audio coder-decoder for MD, CD and MP3 1.5 DAC features • DAC plus interpolator can run at either WSPLL (regenerating the clock from WSI SYSCLK • Separate digital logarithmic volume control for left and 2 right channels via L3-bus or I steps of 0.25 dB • ...
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... NXP Semiconductors Stereo audio coder-decoder for MD, CD and MP3 4 QUICK REFERENCE DATA DDD DDA(AD) DDA(DA) unless otherwise specified. SYMBOL PARAMETER Supplies V ADC analog supply voltage DDA(AD) V DAC analog supply voltage DDA(DA) V headphone analog supply DDA(HP) voltage V digital supply voltage DDD I ADC analog supply current one ADC and microphone amplifier ...
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... NXP Semiconductors Stereo audio coder-decoder for MD, CD and MP3 SYMBOL PARAMETER Analog-to-digital converter (supply voltage 3 digital output level o (THD+N)/S total harmonic distortion- 48 plus-noise to signal ratio kHz s S/N signal-to-noise ratio kHz s α channel separation cs LNA input plus analog-to-digital converter (supply voltage 3.0 V) ...
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... NXP Semiconductors Stereo audio coder-decoder for MD, CD and MP3 SYMBOL PARAMETER S/N signal-to-noise ratio kHz s Headphone driver (supply voltage 3 output power (RMS value) o(rms) (THD+N)/S total harmonic 48 distortion-plus-noise to signal ratio at f S/N signal-to-noise ratio kHz s α channel separation cs Power consumption (supply voltage 3 ...
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... NXP Semiconductors Stereo audio coder-decoder for MD, CD and MP3 6 BLOCK DIAGRAM V DDA(AD) handbook, full pagewidth 32 (28) 31 (27) VINL + (31) VINM MIC AMP 5 (1) RESET 13 (9) SYSCLK 9 (5) DATAO 7 (3) BCKO 8 (4) WSO 10 (6) BCKI 11 (7) WSI 12 (8) DATAI 27 (23) VOUTL Pin numbers for UDA1380HN in parentheses. ...
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... NXP Semiconductors Stereo audio coder-decoder for MD, CD and MP3 7 PINNING PIN SYMBOL UDA1380TT VINR ADCN VINM ADCP RESET DDD BCKO 7 WSO 8 DATAO 9 BCKI 10 WSI 11 DATAI 12 SYSCLK SSD RTCB 15 L3MODE 16 L3CLOCK/ L3DATA/SDA 18 SEL_L3_IIC SSA(HP) VOUTRHP REF(HP) VOUTLHP DDA(HP) VOUTR DDA(DA) VOUTL 27 2004 Apr 22 ...
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... NXP Semiconductors Stereo audio coder-decoder for MD, CD and MP3 PIN SYMBOL UDA1380TT V 28 SSA(DA REF V 30 SSA(AD) VINL DDA(AD) handbook, halfpage VINR 1 V ADCN 2 VINM 3 V ADCP 4 RESET 5 V DDD 6 BCKO 7 WSO 8 UDA1380TT DATAO 9 BCKI 10 WSI 11 DATAI 12 SYSCLK 13 V SSD 14 RTCB ...
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... NXP Semiconductors Stereo audio coder-decoder for MD, CD and MP3 8 FUNCTIONAL DESCRIPTION 8.1 Clock modes There are two clock systems: • A SYSCLK signal, coming from the system • A WSPLL which generates the internal clocks from the incoming WSI signal. The system frequency applied to pin SYSCLK is selectable ...
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... NXP Semiconductors Stereo audio coder-decoder for MD, CD and MP3 8.1.2 C LOCK DISTRIBUTION Figure 5 shows the main clock distribution for the SYSCLK domain and the WSPLL clock domain. For power saving reasons each clock signal inside the system must be controlled and enabled via a separate bit in the ...
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... NXP Semiconductors Stereo audio coder-decoder for MD, CD and MP3 8.2 ADC analog front-end The analog front-end of the UDA1380 consists of one stereo ADC with a selector in front of it (see Fig.6). Using this selector one can either select the microphone input with the microphone amplifier (LNA) with a fixed 29 dB ...
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... NXP Semiconductors Stereo audio coder-decoder for MD, CD and MP3 In applications in which (RMS) input signal is used kΩ resistor must be used in series with the input of the ADC (see Fig.7). This forms a voltage divider together with the internal ADC resistor and ensures that the voltage, applied to the input of the IC, never exceeds 1 V (RMS) ...
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... NXP Semiconductors Stereo audio coder-decoder for MD, CD and MP3 8.4 Interpolation filter (DAC) The interpolation digital filter interpolates from 1 to 64f to 128f , by cascading FIR filters, see Table 4. The s interpolator is equipped with several sound features like volume control, mute, de-emphasis and tone control. ...
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... NXP Semiconductors Stereo audio coder-decoder for MD, CD and MP3 8.6 FSDAC 8.6.1 G ENERAL INFORMATION The Filter-Stream Digital-to-Analog Converter (FSDAC semi-digital reconstruction filter that converts the 1-bit data stream (running at either 64f noise shaper or 128f for the 3rd-order noise shaper) of the s noise shaper into an analog output voltage. The filter ...
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... NXP Semiconductors Stereo audio coder-decoder for MD, CD and MP3 data from handbook, full pagewidth decimation DE-EMPHASIS filter (channel 2) from digital DE-EMPHASIS data input (channel 1) 8.8.2 A NALOG MIXER The analog mixer, which uses the mixer input of the FSDAC, can mix a signal into the FSDAC output signal via an AVC unit (see Fig.11). The mixer can be used to mix a signal into the FSDAC output signal and play it via the headphone driver without the complete coder-decoder running. The analog control range − ...
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... NXP Semiconductors Stereo audio coder-decoder for MD, CD and MP3 8.9 Application modes The operation mode can be set with pin SEL_L3_IIC, either to L3-bus mode (LOW the I (HIGH) as given in Table 5. For all features in microcontroller mode see Chapter 9. Table 5 Pin function in the selected mode ...
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... NXP Semiconductors Stereo audio coder-decoder for MD, CD and MP3 8.11 NALOG FRONT END Figure 12 shows the power control inside the analog front-end. The control of all power-on pins of the ADC front-end is 2 done via separate L3-bus or I C-bus bits. PGA_GAINCTRLL handbook, full pagewidth ...
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... NXP Semiconductors Stereo audio coder-decoder for MD, CD and MP3 8.13 Digital audio data input and output The supported audio formats for the control modes are: • S-bus • MSB-justified • LSB-justified, 16 bits • LSB-justified, 18 bits • LSB-justified, 20 bits • LSB-justified, 24 bits (only for the output interface). ...
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WS LEFT > BCK DATA MSB B2 MSB S-BUS FORMAT WS LEFT > BCK DATA MSB B2 LSB MSB B2 MSB-JUSTIFIED FORMAT ...
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... NXP Semiconductors Stereo audio coder-decoder for MD, CD and MP3 9.1 Introduction The exchange of data and control information between the microcontroller and the UDA1380, is accomplished through a serial hardware interface comprising the following pins: L3DATA/SDA: microcontroller interface data line L3MODE: microcontroller interface mode line L3CLOCK/SCL: microcontroller interface clock line ...
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... NXP Semiconductors Stereo audio coder-decoder for MD, CD and MP3 9.5 Data write mode For writing data to a device, four bytes must be sent. Figure 14 explains the data write mode in a signal diagram: • One byte with the device address, being ‘00000110’, which is including the LSB code 01 for signalling write to the device • ...
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... NXP Semiconductors Stereo audio coder-decoder for MD, CD and MP3 Table 9 L3 prepare read data L3 MODE DATA TYPE Addressing mode device address Data transfer 1 register address Notes 1. First bit in time. 2. Last bit in time. Table 10 L3 read data L3 MODE DATA TYPE Addressing mode device address Data transfer 1 ...
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L3CLOCK L3MODE device address 0 1 L3DATA DOM bits Fig.14 Data write mode for L3 version 2. L3CLOCK L3MODE device address register address L3DATA DOM bits read prepare read Fig.15 Data read mode for L3 version 2. ...
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... NXP Semiconductors Stereo audio coder-decoder for MD, CD and MP3 C-BUS INTERFACE DESCRIPTION 2 The UDA1380 supports I C-bus microcontroller interface mode as well as the L3-bus mode; all features can be controlled by the microcontroller with the same register addresses as in the L3-bus mode. The exchange of data and control information between the ...
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WRITE cycle 2 Table 13 shows the I C-bus configuration for a WRITE cycle. The WRITE cycle is used to write the data to the internal registers. The device and register addresses are one byte each, the setting data ...
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READ cycle 2 Table 14 shows the I C-bus configuration for a READ cycle. The READ cycle is used to read the data values from the internal registers. The format of the READ cycle is as follows: 1. The ...
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... NXP Semiconductors Stereo audio coder-decoder for MD, CD and MP3 11 REGISTER MAPPING Table 15 Register map of control settings (write) REGISTER ADDRESS System settings (running at the L3-bus or I 00H evaluation modes, WSPLL settings, clock divider and clock selectors 2 01H I S-bus I/O settings 02H power control settings ...
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... NXP Semiconductors Stereo audio coder-decoder for MD, CD and MP3 11.1 Evaluation modes and clock settings Table 17 Register address 00H BIT 15 Symbol EV2 EV1 Default 0 BIT 7 − Symbol Default 0 Table 18 Description of register bits BIT SYMBOL EV[2:0] − EN_ADC 10 EN_DEC 9 EN_DAC 8 EN_INT − ...
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... NXP Semiconductors Stereo audio coder-decoder for MD, CD and MP3 BIT SYMBOL 4 DAC_CLK 3 and 2 sys_div[1:0] 1 and 0 PLL[1:0] Table 19 Dividers for system clock input sys_div1 sys_div0 Table 20 WSPLL settings PLL1 PLL0 2004 Apr 22 DESCRIPTION DAC clock select. A 1-bit value to select the clocks for the DAC (interpolator and FSDAC analog block) ...
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... NXP Semiconductors Stereo audio coder-decoder for MD, CD and MP3 2 11.2 I S-bus input and output settings Table 21 Register address 01H BIT 15 − Symbol Default 0 BIT 7 − Symbol SEL_ SOURCE Default 0 Table 22 Description of register bits BIT SYMBOL − SFORI[2:0] − SEL_SOURCE − SIM − ...
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... NXP Semiconductors Stereo audio coder-decoder for MD, CD and MP3 Table 24 Digital data output formats SFORO2 SFORO1 SFORO0 11.3 Power control settings 11.3.1 P OWER CONTROL SETTING BIAS CIRCUITS Using a 1-bit value, the power control settings of the bias circuits of the ADC, AVC and FSDAC can be set. When this bit is set to logic 0, the complete bias circuits of the analog front-end and the FSDAC are shut down ...
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... NXP Semiconductors Stereo audio coder-decoder for MD, CD and MP3 BIT SYMBOL 8 PON_BIAS 7 EN_AVC 6 PON_AVC − PON_LNA 3 PON_PGAL 2 PON_ADCL 1 PON_PGAR 0 PON_ADCR 2004 Apr 22 DESCRIPTION Power-on BIAS. A 1-bit value to set the power control setting of the ADC, AVC and FSDAC. When this bit is logic 0: ADC, AVC and FSDAC bias circuits are powered-off ...
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... NXP Semiconductors Stereo audio coder-decoder for MD, CD and MP3 11.4 Analog mixer settings Table 27 Register address 03H BIT 15 − Symbol Default 0 BIT 7 − Symbol Default 0 Table 28 Description of register bits BIT SYMBOL − 15 and AVCL[5:0] − 7 and AVCR[5:0] 2004 Apr − AVCL5 ...
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... NXP Semiconductors Stereo audio coder-decoder for MD, CD and MP3 Table 29 Analog volume control AVCL5 AVCL4 AVCL3 AVCR5 AVCR4 AVCR3 11.5 Headphone amplifier settings Using a 1-bit value possible to disable the short-circuit protection of the headphone amplifier. This function is provided to offer maximum freedom to users, however due to the nature of this function there is the drawback of possible damage. Bits RSV12, RSV11, RSV10, RSV02, RSV01, and RSV00 are special control bits for manufacturer’ ...
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... NXP Semiconductors Stereo audio coder-decoder for MD, CD and MP3 11.6 Master volume control Table 32 Register address 10H BIT 15 Symbol MVCR_7 MVCR_6 Default 0 BIT 7 Symbol MVCL_7 MVCL_6 Default 0 Table 33 Description of register bits BIT SYMBOL MVCR_[7: MVCL_[7:0] Table 34 Master volume control bits MVCR_7 ...
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... NXP Semiconductors Stereo audio coder-decoder for MD, CD and MP3 11.7 Mixer volume control Table 35 Register address 11H BIT 15 Symbol VC2_7 VC2_6 Default 1 BIT 7 Symbol VC1_7 VC1_6 Default 0 Table 36 Description of register bits BIT SYMBOL VC2_[7: VC1_[7:0] Table 37 Digital mixer volume control VC2_7 ...
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... NXP Semiconductors Stereo audio coder-decoder for MD, CD and MP3 VC2_7 VC2_6 VC2_5 VC1_7 VC1_6 VC1_5 11.8 Mode, bass boost and treble Table 38 Register address 12H BIT 15 Symbol M1 M0 Default 0 BIT 7 − Symbol Default 0 Table 39 Description of register bits BIT SYMBOL 15 and 14 M[1:0] Flat/minimum/maximum setting ...
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... NXP Semiconductors Stereo audio coder-decoder for MD, CD and MP3 Table 41 Treble setting bits TRL1 TRR1 Table 42 Bass boost setting bits BBL3 BBL2 BBR3 BBR2 2004 Apr 22 TRL0 TRR0 BBL1 BBL0 BBR1 BBR0 Product specification UDA1380 FLAT SET MINIMUM SET (dB) (dB) 0 (default) ...
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... NXP Semiconductors Stereo audio coder-decoder for MD, CD and MP3 11.9 Master mute, channel de-emphasis and mute Table 43 Register address 13H BIT 15 − Symbol MTM Default 0 BIT 7 − Symbol Default 0 Table 44 Description of register bits BIT SYMBOL − MTM − 13 and 12 11 MT2 ...
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... NXP Semiconductors Stereo audio coder-decoder for MD, CD and MP3 11.10 Mixer, silence detector and oversampling settings Table 46 Register address 14H BIT 15 Symbol DA_POL_INV Default 0 BIT 7 Symbol SILENCE Default 0 Table 47 Description of register bits BIT SYMBOL 15 DA_POL_INV 14 SEL_NS 13 MIX_POS 12 MIX − SILENCE 6 SDET_ON ...
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... NXP Semiconductors Stereo audio coder-decoder for MD, CD and MP3 Table 48 Mixer signal control setting bits MIX_POS MIX mixing; default volume of channel 1 is forced and volume of channel 2 is forced to −∞ mixing is done before the sound processing: input signals are automatically scaled order to prevent clipping during adding ...
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... NXP Semiconductors Stereo audio coder-decoder for MD, CD and MP3 Table 53 ADC volume control setting bits ML_DEC7 ML_DEC6 ML_DEC5 MR_DEC7 MR_DEC6 MR_DEC5 11.12 PGA settings and mute Table 54 Register address 21H BIT 15 14 − Symbol MT_ADC Default 1 0 BIT 7 6 − − ...
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... NXP Semiconductors Stereo audio coder-decoder for MD, CD and MP3 BIT SYMBOL PGA_GAIN CTRLR[3:0] − PGA_GAIN CTRLL[3:0] Table 56 ADC input amplifier PGA gain setting bits PGA_GAINCTRLR3 PGA_GAINCTRLR2 PGA_GAINCTRLL3 PGA_GAINCTRLL2 11.13 ADC settings Table 57 Register address 22H BIT − − Symbol Default 0 0 BIT ...
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... NXP Semiconductors Stereo audio coder-decoder for MD, CD and MP3 BIT SYMBOL − SEL_LNA 2 SEL_MIC 1 SKIP_DCFIL 0 EN_DCFIL Table 59 Microphone input VGA gain setting bits VGA_CTRL3 VGA_CTRL2 2004 Apr 22 default value 0000 Line input select. A 1-bit value to set the multiplexer in the analog front-end to select between the LNA or the enable-in input for the left ADC ...
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... NXP Semiconductors Stereo audio coder-decoder for MD, CD and MP3 11.14 AGC settings Table 60 Register address 23H BIT 15 14 − − Symbol Default 0 0 BIT 7 6 − − Symbol Default 0 0 Table 61 Description of register bits BIT SYMBOL − AGC_TIME[2:0] − and 2 AGC_LEVEL[1:0] − ...
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... NXP Semiconductors Stereo audio coder-decoder for MD, CD and MP3 Table 63 AGC target level setting bits AGC_LEVEL1 11.15 Restore L3 default values (software reset) Table 64 Register address 7FH BIT 15 − Default value BIT 7 − Default value 11.16 Headphone driver and interpolation filter (read-out) ...
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... NXP Semiconductors Stereo audio coder-decoder for MD, CD and MP3 BIT SYMBOL 4 SDETR1 3 SDETL1 2 MUTE_STATE_M 1 MUTE_STATE_CH2 0 MUTE_STATE_CH1 11.17 Decimator read-out Table 67 Register address 28H BIT 15 14 − − Symbol BIT 7 6 − − Symbol Table 68 Description of register bits BIT SYMBOL − AGC_STAT − ...
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... NXP Semiconductors Stereo audio coder-decoder for MD, CD and MP3 12 LIMITING VALUES In accordance with the Absolute Maximum Rating System (IEC 60134). SYMBOL PARAMETER V supply voltage DD T maximum crystal temperature xtal(max) T storage temperature stg T ambient temperature amb V electrostatic handling voltage es I latch-up protection current ...
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... NXP Semiconductors Stereo audio coder-decoder for MD, CD and MP3 16 DC CHARACTERISTICS DDD DDA(AD) DDA(DA) unless otherwise specified. SYMBOL PARAMETER Supplies; note 1 V ADC analog supply voltage DDA(AD) V DAC analog supply voltage DDA(DA) V headphone analog supply DDA(HP) voltage V digital supply voltage DDD ...
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... NXP Semiconductors Stereo audio coder-decoder for MD, CD and MP3 SYMBOL PARAMETER Digital input pins (5 V tolerant TTL compatible) V HIGH-level input voltage IH V LOW-level input voltage IL ⎪I ⎪ input leakage current LI C input capacitance i Digital output pins V HIGH-level output voltage OH V LOW-level output voltage ...
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... NXP Semiconductors Stereo audio coder-decoder for MD, CD and MP3 17 AC CHARACTERISTICS DDD DDA(AD) DDA(DA) respect to ground; unless otherwise specified. SYMBOL PARAMETER Analog-to-digital converter D digital output level o ΔV unbalance between channels i (THD + N)/S total harmonic 48 distortion-plus-noise to signal kHz s S/N signal-to-noise ratio at 48 ...
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... NXP Semiconductors Stereo audio coder-decoder for MD, CD and MP3 SYMBOL PARAMETER LNA input plus analog-to-digital converter V input voltage (RMS value) i(rms) (THD+N)/S total harmonic 48 distortion-plus-noise to signal ratio kHz s S/N signal-to-noise ratio kHz s α channel separation cs Digital-to-analog converter V output voltage (RMS value) o(rms) Δ ...
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... NXP Semiconductors Stereo audio coder-decoder for MD, CD and MP3 SYMBOL PARAMETER AVC (line input via ADC input, output on line output and headphone driver) V input voltage (RMS value) i(rms) (THD+N)/S total harmonic 48 distortion-plus-noise to signal ratio kHz s S/N signal-to-noise ratio kHz s α channel separation ...
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... NXP Semiconductors Stereo audio coder-decoder for MD, CD and MP3 18 TIMING DDD DDA(AD) DDA(DA) otherwise specified. SYMBOL PARAMETER System clock timing; note 1 T system clock cycle time sys t system clock LOW time CWL t system clock HIGH time CWH Serial interface input/output data timing (see Fig.17) ...
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... NXP Semiconductors Stereo audio coder-decoder for MD, CD and MP3 SYMBOL PARAMETER t L3MODE stop time in data transfer stp(L3) mode t L3DATA set-up time in address and su(L3)DA data transfer mode t L3DATA hold time in address and h(L3)DA data transfer mode t L3DATA delay time in data transfer ...
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... NXP Semiconductors Stereo audio coder-decoder for MD, CD and MP3 t CWH handbook, full pagewidth handbook, full pagewidth WS t BCKH t r BCK T cy(BCK) DATAO DATAI 2004 Apr 22 t CWL T sys Fig.16 Timing of system clock. t h(WS su(WS) t BCKL t d(DATAO-WS) Fig.17 Serial interface input data timing. ...
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... NXP Semiconductors Stereo audio coder-decoder for MD, CD and MP3 handbook, full pagewidth L3MODE t h(L3)A L3CLOCK L3DATA handbook, full pagewidth L3MODE t su(L3)D L3CLOCK L3DATA write L3DATA read 2004 Apr 22 t CLK(L3)L t CLK(L3)H t su(L3)A t su(L3)DA BIT 0 Fig.18 Timing of address mode. t CLK(L3)L t CLK(L3)H t su(L3)DA ...
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SDA t BUF t LOW t r SCL t HD;STA t HD;DAT SU;STA t HIGH t SU;DAT Sr 2 Fig.20 Timing of the I C-bus transfer. t HD;STA SU;STO P MBC611 ...
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... NXP Semiconductors Stereo audio coder-decoder for MD, CD and MP3 19 APPLICATION INFORMATION BLM31A601S handbook, full pagewidth +3 V BLM31A601S 100 μF ground ( μF left input ( μF right input ( μF micro- phone input (16 V) L3DATA/SDA L3CLOCK/SCL L3MODE SEL_L3_IIC SYSCLK system clock 47 Ω Pin numbers for UDA1380HN in parentheses. ...
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... NXP Semiconductors Stereo audio coder-decoder for MD, CD and MP3 20 PACKAGE OUTLINES TSSOP32: plastic thin shrink small outline package; 32 leads; body width 6.1 mm; lead pitch 0. pin 1 index 1 e DIMENSIONS (mm are the original dimensions) A UNIT max. 0.15 0.95 mm 1.1 0.25 0.05 0.85 Notes 1 ...
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... NXP Semiconductors Stereo audio coder-decoder for MD, CD and MP3 HVQFN32: plastic thermal enhanced very thin quad flat package; no leads; 32 terminals; body 0.85 mm terminal 1 index area terminal 1 index area 32 DIMENSIONS (mm are the original dimensions) (1) A UNIT max. 0.05 0. 0.2 0.00 0.18 Note 1 ...
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... NXP Semiconductors Stereo audio coder-decoder for MD, CD and MP3 21 SOLDERING 21.1 Introduction to soldering surface mount packages This text gives a very brief insight to a complex technology. A more in-depth account of soldering ICs can be found in our “Data Handbook IC26; Integrated Circuit Packages” (document order number 9398 652 90011). ...
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... Notes 1. For more detailed information on the BGA packages refer to the “(LF)BGA Application Note” (AN01026); order a copy from your NXP Semiconductors sales office. 2. All surface mount (SMD) packages are moisture sensitive. Depending upon the moisture content, the maximum temperature (with respect to time) and body size of the package, there is a risk that internal or external package cracks may occur due to vaporization of the moisture in them (the so called popcorn effect). For details, refer to the Drypack information in the “ ...
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... In no event shall NXP Semiconductors be liable for any indirect, incidental, punitive, special or consequential damages (including - without limitation - lost profits, lost savings, business interruption, costs related to the ...
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... NXP Semiconductors’ specifications such use shall be solely at customer’s own risk, and (c) customer fully indemnifies NXP Semiconductors for any liability, damages or failed product claims resulting from customer design and use of the product for automotive applications beyond NXP Semiconductors’ ...
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... RF, Analog, Power Management, Interface, Security and Digital Processing expertise Customer notification This data sheet was changed to reflect the new company name NXP Semiconductors. No changes were made to the content, except for the legal definitions and disclaimers. Contact information For additional information please visit: http://www ...