PCA9536D,118 NXP Semiconductors, PCA9536D,118 Datasheet

IC I/O EXPANDER I2C 4B 8SOIC

PCA9536D,118

Manufacturer Part Number
PCA9536D,118
Description
IC I/O EXPANDER I2C 4B 8SOIC
Manufacturer
NXP Semiconductors
Datasheet

Specifications of PCA9536D,118

Package / Case
8-SOIC (3.9mm Width)
Interface
I²C, SMBus
Number Of I /o
4
Interrupt Output
No
Frequency - Clock
400kHz
Voltage - Supply
2.3 V ~ 5.5 V
Operating Temperature
-40°C ~ 85°C
Mounting Type
Surface Mount
Includes
POR
Logic Family
PCA9536
Number Of Lines (input / Output)
4.0 / 4.0
Operating Supply Voltage
2.3 V to 5.5 V
Power Dissipation
200 mW
Operating Temperature Range
- 40 C to + 85 C
Input Voltage
5 V
Logic Type
I2C, SMBus
Maximum Clock Frequency
400 KHz
Mounting Style
SMD/SMT
Number Of Input Lines
4.0
Number Of Output Lines
4.0
Output Current
50 mA
Output Voltage
5 V
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
For Use With
568-3615 - DEMO BOARD I2C
Lead Free Status / Rohs Status
Lead free / RoHS Compliant
Other names
568-1835-2
935277415118
PCA9536D-T
1. General description
2. Features
The PCA9536 is an 8-pin CMOS device that provides 4 bits of General Purpose parallel
Input/Output (GPIO) expansion for I
enhance the NXP Semiconductors family of I
provide a simple solution when additional I/O is needed for ACPI power switches,
sensors, push buttons, LEDs, fans, etc.
The PCA9536 consists of a 4-bit Configuration register (input or output selection), 4-bit
Input Port register, 4-bit Output Port register and a 4-bit Polarity Inversion register
(active HIGH or active LOW operation). The system master can enable the I/Os as either
inputs or outputs by writing to the I/O configuration bits. The data for each input or output
is kept in the corresponding Input Port or Output Port register. The polarity of the read
register can be inverted with the Polarity Inversion register. All registers can be read by
the system master.
The power-on reset sets the registers to their default values and initializes the device state
machine.
The I
PCA9536
4-bit I
Rev. 05 — 25 January 2010
4-bit I
Operating power supply voltage range of 2.3 V to 5.5 V
5 V tolerant I/Os
Polarity Inversion register
Low standby current
Noise filter on SCL/SDA inputs
No glitch on power-up
Internal power-on reset
4 I/O pins which default to 4 inputs with 100 kΩ internal pull-up resistor
0 Hz to 400 kHz clock frequency
ESD protection exceeds 2000 V HBM per JESD22-A114, 200 V MM per
JESD22-A115 and 1000 V CDM per JESD22-C101
Latch-up testing is done to JEDEC Standard JESD78 which exceeds 100 mA
Packages offered: SO8, TSSOP8 (MSOP8), HVSON8
2
C-bus address is fixed and allows only one device on the same I
2
C-bus GPIO
2
C-bus and SMBus I/O port
2
C-bus/SMBus applications and was developed to
2
C-bus I/O expanders. I/O expanders
Product data sheet
2
C-bus/SMBus.

Related parts for PCA9536D,118

PCA9536D,118 Summary of contents

Page 1

... General description The PCA9536 is an 8-pin CMOS device that provides 4 bits of General Purpose parallel Input/Output (GPIO) expansion for I enhance the NXP Semiconductors family of I provide a simple solution when additional I/O is needed for ACPI power switches, sensors, push buttons, LEDs, fans, etc. ...

Page 2

... NXP Semiconductors 3. Ordering information Table 1. − amb Type number PCA9536D PCA9536DP PCA9536TK [1] Also known as MSOP8. 4. Block diagram SCL SDA V V Fig 1. PCA9536_5 Product data sheet Ordering information ° ° +85 C Topside Package mark Name PCA9536 SO8 [1] 9536 TSSOP8 9536 HVSON8 PCA9536 ...

Page 3

... NXP Semiconductors 5. Pinning information 5.1 Pinning Fig 2. Fig 4. 5.2 Pin description Table 2. Symbol IO0 IO1 IO2 V SS IO3 SCL SDA V DD PCA9536_5 Product data sheet IO0 IO1 SDA PCA9536D IO2 3 6 SCL IO3 SS 002aab849 Pin configuration for SO8 terminal 1 index area ...

Page 4

... NXP Semiconductors 6. Functional description Refer to 6.1 Registers 6.1.1 Command byte Table 3. Command The command byte is the first byte to follow the address byte during a write transmission used as a pointer to determine which of the following registers will be written or read. 6.1.2 Register 0 - Input Port register This register is a read-only port ...

Page 5

... NXP Semiconductors 6.1.3 Register 1 - Output Port register This register reflects the outgoing logic levels of the pins defined as outputs by Register 3. Bit values in this register have no effect on pins defined as inputs. Reads from this register return the value that is in the flip-flop controlling the output selection, not the actual pin value. ‘ ...

Page 6

... NXP Semiconductors 6.1.5 Register 3 - Configuration register This register configures the directions of the I/O pins bit in this register is set, the corresponding port pin is enabled as an input with high-impedance output driver bit in this register is cleared, the corresponding port pin is enabled as an output. At reset, the I/Os are configured as inputs with a weak pull- ‘ ...

Page 7

... NXP Semiconductors shift register shift register write configuration write pulse shift register write polarity Fig 5. 6.4 Device address Fig 6. 6.5 Bus transactions Data is transmitted to the PCA9536 registers using the Write mode as shown in and Figure Figure 9 once a command byte has been sent, the register which was addressed will continue to be accessed by reads until a new command byte has been sent ...

Page 8

... NXP Semiconductors SCL slave address SDA START condition write to port data out from port Fig 7. Write to Output Port register SCL slave address SDA START condition data to register Fig 8. Write to Configuration register or Polarity Inversion register slave address SDA START condition acknowledge slave address (cont ...

Page 9

... NXP Semiconductors SCL slave address SDA START condition read from port data into port This figure assumes the command byte has previously been programmed with 00h. Transfer of data can be stopped at any moment by a STOP condition. Fig 10. Read Input Port register 7. Application design-in information ...

Page 10

... NXP Semiconductors 8. Limiting values Table 8. In accordance with the Absolute Maximum Rating System (IEC 60134). Symbol I/O I O(IOn tot T stg T amb T j(max) PCA9536_5 Product data sheet Limiting values Parameter supply voltage input current voltage on an input/output pin output current on pin IOn ...

Page 11

... NXP Semiconductors 9. Static characteristics Table 9. Static characteristics Symbol Parameter Supplies V supply voltage DD I supply current DD I standby current stb V power-on reset voltage POR Input SCL; input/output SDA V LOW-level input voltage IL V HIGH-level input voltage IH I LOW-level output current OL I leakage current ...

Page 12

... NXP Semiconductors 10. Dynamic characteristics Table 10. Dynamic characteristics Symbol Parameter f SCL clock frequency SCL t bus free time between a STOP and BUF START condition t hold time (repeated) START condition HD;STA t set-up time for a repeated START SU;STA condition t set-up time for STOP condition SU;STO ...

Page 13

... NXP Semiconductors protocol SCL SDA Fig 13. I 11. Test information Fig 14. Test circuitry for switching times Fig 15. Test circuit Table 11. Test t v(Q) PCA9536_5 Product data sheet START bit 7 bit 6 condition MSB (A6) (S) (A7 SU;STA LOW HIGH BUF HD;STA SU;DAT Rise and fall times refer to V ...

Page 14

... NXP Semiconductors 12. Package outline SO8: plastic small outline package; 8 leads; body width 3 pin 1 index 1 DIMENSIONS (inch dimensions are derived from the original mm dimensions) A UNIT max. 0.25 1.45 mm 1.75 0.25 0.10 1.25 0.010 0.057 inches 0.069 0.01 0.004 0.049 Notes 1. Plastic or metal protrusions of 0.15 mm (0.006 inch) maximum per side are not included. ...

Page 15

... NXP Semiconductors TSSOP8: plastic thin shrink small outline package; 8 leads; body width pin 1 index 1 e DIMENSIONS (mm are the original dimensions UNIT max. 0.15 0.95 mm 1.1 0.25 0.05 0.80 Notes 1. Plastic or metal protrusions of 0.15 mm maximum per side are not included. 2. Plastic or metal protrusions of 0.25 mm maximum per side are not included. ...

Page 16

... NXP Semiconductors HVSON8: plastic thermal enhanced very thin small outline package; no leads; 8 terminals; body 0. terminal 1 index area terminal 1 index area DIMENSIONS (mm are the original dimensions) (1) A UNIT max. 0.05 0 0.2 0.00 0.2 Note 1. Plastic or metal protrusions of 0.075 mm maximum per side are not included. ...

Page 17

... NXP Semiconductors 13. Handling information All input and output pins are protected against ElectroStatic Discharge (ESD) under normal handling. When handling ensure that the appropriate precautions are taken as described in JESD625-A or equivalent standards. 14. Soldering of SMD packages This text provides a very brief insight into a complex technology. A more in-depth account of soldering ICs can be found in Application Note AN10365 “ ...

Page 18

... NXP Semiconductors • Process issues, such as application of adhesive and flux, clinching of leads, board transport, the solder wave parameters, and the time during which components are exposed to the wave • Solder bath specifications, including temperature and impurities 14.4 Reflow soldering Key characteristics in reflow soldering are: • ...

Page 19

... NXP Semiconductors Fig 19. Temperature profiles for large and small components For further information on temperature profiles, refer to Application Note AN10365 “Surface mount reflow soldering description”. 15. Abbreviations Table 14. Acronym ACPI CDM DUT ESD FET GPIO HBM 2 I C-bus I/O LED MM POR SMBus ...

Page 20

... NXP Semiconductors 16. Revision history Table 15. Revision history Document ID Release date PCA9536_5 20100125 • Modifications: Table 9 “Static – I – I • Table 10 “Dynamic changed from “μs” to “ns” Remark: The changes made in this revision are to correct typographical errors only. There is no change in the performance of the device. ...

Page 21

... Right to make changes — NXP Semiconductors reserves the right to make changes to information published in this document, including without limitation specifications and product descriptions, at any time and without notice ...

Page 22

... NXP Semiconductors 19. Contents 1 General description . . . . . . . . . . . . . . . . . . . . . . 1 2 Features . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1 3 Ordering information . . . . . . . . . . . . . . . . . . . . . 2 4 Block diagram . . . . . . . . . . . . . . . . . . . . . . . . . . 2 5 Pinning information . . . . . . . . . . . . . . . . . . . . . . 3 5.1 Pinning . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3 5.2 Pin description . . . . . . . . . . . . . . . . . . . . . . . . . 3 6 Functional description . . . . . . . . . . . . . . . . . . . 4 6.1 Registers . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4 6.1.1 Command byte . . . . . . . . . . . . . . . . . . . . . . . . . 4 6.1.2 Register 0 - Input Port register . . . . . . . . . . . . . 4 6.1.3 Register 1 - Output Port register 6.1.4 Register 2 - Polarity Inversion register . . . . . . . 5 6 ...

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