PCA9674PW,118 NXP Semiconductors, PCA9674PW,118 Datasheet

IC I/O EXPANDER I2C 8B 16TSSOP

PCA9674PW,118

Manufacturer Part Number
PCA9674PW,118
Description
IC I/O EXPANDER I2C 8B 16TSSOP
Manufacturer
NXP Semiconductors
Datasheet

Specifications of PCA9674PW,118

Package / Case
16-TSSOP
Interface
I²C
Number Of I /o
8
Interrupt Output
Yes
Frequency - Clock
1MHz
Voltage - Supply
2.3 V ~ 5.5 V
Operating Temperature
-40°C ~ 85°C
Mounting Type
Surface Mount
Includes
POR
Logic Family
PCA
Operating Supply Voltage
2.3 V to 5.5 V
Power Dissipation
400 mW
Operating Temperature Range
- 40 C to + 85 C
Mounting Style
SMD/SMT
Output Current
50 mA
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Lead Free Status / RoHS Status
Lead free / RoHS Compliant, Lead free / RoHS Compliant
Other names
568-4077-2
935282735118
PCA9674PW-T
PCA9674PW-T
1. General description
2. Features
The PCA9674/74A provide general purpose remote I/O expansion for most
microcontroller families via the two-line bidirectional bus (I
Fast-mode Plus (Fm+) family.
The PCA9674/74A is a drop-in upgrade for the PCF8574/74A providing higher Fast-mode
Plus I
dimming of LEDs, higher I
can be on the bus without the need for bus buffers, higher total package sink capacity
(200 mA versus 100 mA) that supports having all LEDs on at the same time and more
device addresses (64 versus 8) are available to allow many more devices on the bus
without address conflicts.
The devices consist of an 8-bit quasi-bidirectional port and an I
PCA9674/74A have low current consumption and include latched outputs with 25 mA high
current drive capability for directly driving LEDs.
They also possess an interrupt line (INT) that can be connected to the interrupt logic of
the microcontroller. By sending an interrupt signal on this line, the remote I/O can inform
the microcontroller if there is incoming data on its ports without having to communicate via
the I
The internal Power-On Reset (POR) or Software Reset sequence initializes the I/Os as
inputs.
I
I
I
I
I
I
I
I
I
I
I
I
I
PCA9674/74A
Remote 8-bit I/O expander for Fm+ I
Rev. 05 — 15 June 2009
1 MHz I
Compliant with the I
SDA with 30 mA sink capability for 4000 pF buses
2.3 V to 5.5 V operation with 5.5 V tolerant I/Os
8-bit remote I/O pins that default to inputs at power-up
Latched outputs with 25 mA sink capability for directly driving LEDs
Total package sink capability of 200 mA
Active LOW open-drain interrupt output
64 programmable slave addresses using 3 address pins
Readable device ID (manufacturer, device type, and revision)
Low standby current
ESD protection exceeds 2000 V HBM per JESD22-A114, 200 V MM per
JESD22-A115, and 1000 V CDM per JESD22-C101
2
40 C to +85 C operation
C-bus.
2
C-bus speeds (1 MHz versus 400 kHz) so that the output can support PWM
2
C-bus interface
2
C-bus Fast and Standard modes
2
C-bus drive (30 mA versus 3 mA) so that many more devices
2
C-bus with interrupt
2
C-bus) and is a part of the
2
C-bus interface. The
Product data sheet

Related parts for PCA9674PW,118

PCA9674PW,118 Summary of contents

Page 1

PCA9674/74A Remote 8-bit I/O expander for Fm+ I Rev. 05 — 15 June 2009 1. General description The PCA9674/74A provide general purpose remote I/O expansion for most microcontroller families via the two-line bidirectional bus (I Fast-mode Plus (Fm+) family. The ...

Page 2

... NXP Semiconductors I Latch-up testing is done to JEDEC standard JESD78 which exceeds 100 mA I Packages offered: SO16, SSOP20, TSSOP16, HVQFN16 3. Applications I LED signs and displays I Servers I Industrial control I Medical equipment I PLCs I Cellular telephones I Gaming machines I Instrumentation and test measurement 4. Ordering information Table 1. Ordering information ...

Page 3

... NXP Semiconductors 5. Block diagram INT AD0 AD1 AD2 SCL SDA Fig 1. data from Shift Register data to Shift Register Fig 2. PCA9674_PCA9674A_5 Product data sheet Remote 8-bit I/O expander for Fm+ I PCA9674 PCA9674A INTERRUPT LOGIC 2 INPUT I C-BUS FILTER CONTROL POWER-ON RESET Block diagram of PCA9674/74A ...

Page 4

... NXP Semiconductors 6. Pinning information 6.1 Pinning AD0 AD1 AD2 V Fig 3. INT SCL n.c. SDA V DD AD0 AD1 n.c. AD2 P0 Fig 5. PCA9674_PCA9674A_5 Product data sheet Remote 8-bit I/O expander for Fm SDA 3 14 SCL PCA9674D INT PCA9674AD 002aac111 Pin configuration for SO16 ...

Page 5

... NXP Semiconductors 6.2 Pin description Table 2. Symbol AD0 AD1 AD2 INT SCL SDA V DD Table 3. Symbol INT SCL n.c. SDA V DD AD0 AD1 n.c. AD2 n. n. PCA9674_PCA9674A_5 Product data sheet Remote 8-bit I/O expander for Fm+ I Pin description for SO16, TSSOP16 ...

Page 6

... NXP Semiconductors Table 4. Symbol AD2 [ INT SCL SDA V DD AD0 AD1 [1] HVQFN16 package die supply ground is connected to both the and board-level performance, the exposed pad needs to be soldered to the board using a corresponding thermal pad on the board, and for proper heat conduction through the board thermal vias need to be incorporated in the PCB in the thermal pad region ...

Page 7

... NXP Semiconductors Fig 7. The last bit of the first byte defines the operation to be performed. When set to logic 1 a read is selected, while a logic 0 selects a write operation. When AD2, AD1 and AD0 are held to V PCF8574A is applied. 7.1.1 Address maps Table 5. AD2 V SS ...

Page 8

... NXP Semiconductors Table 5. AD2 SCL SCL SCL SCL SDA SDA SDA SDA SCL SCL SCL SCL SDA SDA SDA SDA SCL SCL SCL SCL SDA SDA SDA SDA SCL SCL SCL SCL SDA SDA SDA SDA PCA9674_PCA9674A_5 Product data sheet Remote 8-bit I/O expander for Fm+ I PCA9674 address map … ...

Page 9

... NXP Semiconductors Table 6. AD2 SCL SCL SCL SCL SDA SDA SDA SDA PCA9674_PCA9674A_5 Product data sheet Remote 8-bit I/O expander for Fm+ I PCA9674A address map AD1 AD0 A6 A5 SCL SCL SDA SDA SCL SCL SDA SDA SCL SCL 0 1 SCL SDA ...

Page 10

... NXP Semiconductors Table 6. AD2 SCL SCL SCL SCL SDA SDA SDA SDA SCL SCL SCL SCL SDA SDA SDA SDA SCL SCL SCL SCL SDA SDA SDA SDA [1] The PCA9674A does not acknowledge when AD2, AD1, AD0 follows this configuration. ...

Page 11

... NXP Semiconductors Fig 9. 7.2.1 Software Reset The Software Reset Call allows all the devices in the I state value through a specific formatted I implies that the I The Software Reset sequence is defined as following START command is sent by the I 2. The reserved General Call I is sent by the I 3. The PCA9674/74A device(s) acknowledge(s) after seeing the General Call address ‘ ...

Page 12

... NXP Semiconductors 7.2.2 Device ID (PCA9674/74A ID field) The Device ID field is a 3-byte read-only (24 bits) word giving the following information: • 8 bits with the manufacturer name, unique per manufacturer (for example, NXP). • 13 bits with the part identification, assigned by manufacturer, the 7 MSBs with the category ID and the 6 LSBs with the feature ID (for example, for example PCA9674/74A 16-bit quasi-output I/O expander) ...

Page 13

... NXP Semiconductors S 1 START condition M7 manufacturer name = 00000000 Fig 12. Device ID field reading 8. I/O programming 8.1 Quasi-bidirectional I/O architecture The PCA9674/74A’s 8 ports (see either as input or output ports. Input data is transferred from the ports to the microcontroller in the Read mode (see in the Write mode (see This quasi-bidirectional I/O can be used as an input or output without the use of a control signal for data directions ...

Page 14

... NXP Semiconductors SCL slave address SDA START condition write to port data output from port P5 output voltage P5 pull-up output current INT Fig 13. Write mode (output) 8.3 Reading from a port (Input mode) All ports programmed as input should be set to logic 1. To read, the master (microcontroller) fi ...

Page 15

... NXP Semiconductors 8.4 Power-on reset When power is applied to V PCA9674/74A in a reset condition until V condition is released and the PCA9674/74A registers and I will initialize to their default states. Thereafter V the device. 8.5 Interrupt output (INT) The PCA9674/74A provides an open-drain interrupt (INT) which can be fed to a ...

Page 16

... NXP Semiconductors 9. Characteristics of the I 2 The I C-bus is for 2-way, 2-line communication between different ICs or modules. The two lines are a serial data line (SDA) and a serial clock line (SCL). Both lines must be connected to a positive supply via a pull-up resistor when connected to the output stages of a device ...

Page 17

... NXP Semiconductors SDA SCL MASTER TRANSMITTER/ RECEIVER Fig 18. System configuration 9.3 Acknowledge The number of data bytes transferred between the START and the STOP conditions from transmitter to receiver is not limited. Each byte of eight bits is followed by one acknowledge bit. The acknowledge bit is a HIGH level put on the bus by the transmitter, whereas the master generates an extra acknowledge related clock pulse ...

Page 18

... NXP Semiconductors 10. Application design-in information 10.1 Bidirectional I/O expander applications In the 8-bit I/O expander application shown in P7 are outputs. When used in this configuration, during a write, the input (P0 and P1) must be written as HIGH so the external devices fully control the input ports. The desired HIGH or LOW logic levels may be written to the I/Os used as outputs (P2 to P7) ...

Page 19

... NXP Semiconductors 11. Limiting values Table 7. In accordance with the Absolute Maximum Rating System (IEC 60134). Symbol tot P/out T stg T amb [1] Total package (maximum) output current is 400 mA. PCA9674_PCA9674A_5 Product data sheet Remote 8-bit I/O expander for Fm+ I Limiting values Parameter supply voltage ...

Page 20

... NXP Semiconductors 12. Static characteristics Table 8. Static characteristics Symbol Parameter Supplies V supply voltage DD I supply current DD I standby current stb V power-on reset voltage POR Input SCL; input/output SDA V LOW-level input voltage IL V HIGH-level input voltage IH I LOW-level output current OL I leakage current ...

Page 21

... NXP Semiconductors 13. Dynamic characteristics Table 9. Dynamic characteristics Symbol Parameter f SCL clock frequency SCL t bus free time between a BUF STOP and START condition t hold time (repeated) START HD;STA condition t set-up time for a repeated SU;STA START condition t set-up time for STOP SU;STO ...

Page 22

... NXP Semiconductors START protocol condition (S) t SU;STA SCL t BUF SDA t HD;STA Rise and fall times refer Fig 22. I C-bus timing diagram PCA9674_PCA9674A_5 Product data sheet Remote 8-bit I/O expander for Fm+ I bit 7 bit 6 MSB (A6) (A7 LOW HIGH 1 /f SCL SU;DAT HD;DAT and V ...

Page 23

... NXP Semiconductors 14. Package outline HVQFN16: plastic thermal enhanced very thin quad flat package; no leads; 16 terminals; body 0.85 mm terminal 1 index area terminal 1 index area DIMENSIONS (mm are the original dimensions) (1) A UNIT max. 0.05 0. 0.2 0.00 0.18 Note 1. Plastic or metal protrusions of 0.075 mm maximum per side are not included. ...

Page 24

... NXP Semiconductors SO16: plastic small outline package; 16 leads; body width 7 pin 1 index 1 e DIMENSIONS (inch dimensions are derived from the original mm dimensions) A UNIT max. 0.3 2.45 2.65 mm 0.25 0.1 2.25 0.012 0.096 0.1 inches 0.01 0.004 0.089 Note 1. Plastic or metal protrusions of 0.15 mm (0.006 inch) maximum per side are not included. ...

Page 25

... NXP Semiconductors TSSOP16: plastic thin shrink small outline package; 16 leads; body width 4 pin 1 index 1 DIMENSIONS (mm are the original dimensions) A UNIT max. 0.15 0.95 mm 1.1 0.25 0.05 0.80 Notes 1. Plastic or metal protrusions of 0.15 mm maximum per side are not included. 2. Plastic interlead protrusions of 0.25 mm maximum per side are not included. ...

Page 26

... NXP Semiconductors SSOP20: plastic shrink small outline package; 20 leads; body width 4 pin 1 index 1 DIMENSIONS (mm are the original dimensions) A UNIT max. 0.15 1.4 mm 1.5 0.25 0 1.2 Note 1. Plastic or metal protrusions of 0.20 mm maximum per side are not included. OUTLINE VERSION IEC SOT266-1 Fig 26. Package outline SOT266-1 (SSOP20) ...

Page 27

... NXP Semiconductors 15. Handling information All input and output pins are protected against ElectroStatic Discharge (ESD) under normal handling. When handling ensure that the appropriate precautions are taken as described in JESD625-A or equivalent standards. 16. Soldering of SMD packages This text provides a very brief insight into a complex technology. A more in-depth account of soldering ICs can be found in Application Note AN10365 “ ...

Page 28

... NXP Semiconductors • Process issues, such as application of adhesive and flux, clinching of leads, board transport, the solder wave parameters, and the time during which components are exposed to the wave • Solder bath specifications, including temperature and impurities 16.4 Reflow soldering Key characteristics in reflow soldering are: • ...

Page 29

... NXP Semiconductors Fig 27. Temperature profiles for large and small components For further information on temperature profiles, refer to Application Note AN10365 “Surface mount reflow soldering description” . 17. Abbreviations Table 12. Acronym CDM ESD GPIO HBM LED C-bus ID LSB MM MSB PLC PWM SMBus ...

Page 30

... NXP Semiconductors 18. Revision history Table 13. Revision history Document ID Release date PCA9674_PCA9674A_5 20090615 • Modifications: Table 8 “Static – – PCA9674_PCA9674A_4 20090303 PCA9674_PCA9674A_3 20070907 PCA9674_PCA9674A_2 20061012 PCA9674_PCA9674A_1 20060905 PCA9674_PCA9674A_5 Product data sheet Remote 8-bit I/O expander for Fm+ I Data sheet status Product data sheet characteristics” ...

Page 31

... Right to make changes — NXP Semiconductors reserves the right to make changes to information published in this document, including without limitation specifications and product descriptions, at any time and without notice ...

Page 32

... NXP Semiconductors 21. Contents 1 General description . . . . . . . . . . . . . . . . . . . . . . 1 2 Features . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1 3 Applications . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2 4 Ordering information . . . . . . . . . . . . . . . . . . . . . 2 5 Block diagram . . . . . . . . . . . . . . . . . . . . . . . . . . 3 6 Pinning information . . . . . . . . . . . . . . . . . . . . . . 4 6.1 Pinning . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4 6.2 Pin description . . . . . . . . . . . . . . . . . . . . . . . . . 5 7 Functional description . . . . . . . . . . . . . . . . . . . 6 7.1 Device address . . . . . . . . . . . . . . . . . . . . . . . . . 6 7.1.1 Address maps 7.2 Software Reset Call, and device ID addresses 10 7.2.1 Software Reset . . . . . . . . . . . . . . . . . . . . . . . . 11 7.2.2 Device ID (PCA9674/74A ID fi ...

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