PCA9670D,518

PCA9670 Remote 8-bit I/O expander for Fm+ I Rev. 02 — 17 July 2007 1. General description The PCA9670 provides general purpose remote I/O expansion for most microcontroller families via the two-line bidirectional bus (I family. The PCA9670 is a ...

... NXP Semiconductors 3. Applications I LED signs and displays I Servers I Industrial control I Medical equipment I PLCs I Cellular telephones I Gaming machines I Instrumentation and test measurement 4. Ordering information Table 1. Ordering information Type number Topside Package mark Name PCA9670BS 670 HVQFN16 PCA9670D PCA9670D SO16 PCA9670PW PCA9670 TSSOP16 5 ...

... NXP Semiconductors data from Shift Register data to Shift Register Fig 2. Simplified schematic diagram Pinning information 6.1 Pinning AD0 AD1 AD2 Fig 3. Pin configuration for SO16 Fig 5. Pin configuration for HVQFN16 PCA9670_2 Product data sheet Remote 8-bit I/O expander for Fm+ I ...

... NXP Semiconductors 6.2 Pin description Table 2. Symbol AD0 AD1 AD2 RESET SCL SDA V DD [1] HVQFN package die supply ground is connected to both the V pin must be connected to supply ground for proper device operation. For enhanced thermal, electrical, and board-level performance, the exposed pad needs to be soldered to the board using a corresponding thermal pad on the board, and for proper heat conduction through the board thermal vias need to be incorporated in the PCB in the thermal pad region ...

... NXP Semiconductors 7. Functional description Refer to 7.1 Device address Following a START condition, the bus master must send the address of the slave it is accessing and the operation it wants to perform (read or write). The address of the PCA9670 is shown in 64 slave addresses. To conserve power, no internal pull-up resistors are incorporated on AD2, AD1, and AD0. Address values depending on AD2, AD1, and AD0 can be found in Table 3 “ ...

... NXP Semiconductors 7.1.1 Address maps Table 3. AD2 PCA9670_2 Product data sheet Remote 8-bit I/O expander for Fm+ I PCA9670 address map AD1 AD0 A6 A5 SCL SCL SDA SDA SCL SCL SDA SDA SCL SCL 0 0 SCL SDA 0 0 SDA SCL 0 0 SDA ...

... NXP Semiconductors Table 3. AD2 SCL SCL SCL SCL SDA SDA SDA SDA SCL SCL SCL SCL SDA SDA SDA SDA SCL SCL SCL SCL SDA SDA SDA SDA SCL SCL SCL SCL SDA SDA SDA SDA PCA9670_2 Product data sheet Remote 8-bit I/O expander for Fm+ I PCA9670 address map … ...

... NXP Semiconductors 7.2 Software Reset Call, and device ID addresses Two other different addresses can be sent to the PCA9670. • General Call address: allows to reset the PCA9670 through the I reception of the right I information. • Device ID address: allows to read ID information from the device (manufacturer, part identifi ...

... NXP Semiconductors 2 The I C-bus master must interpret a non-acknowledge from the PCA9670 (at any time ‘Software Reset Abort’. The PCA9670 does not initiate a reset of its registers. The unique sequence that initiates a Software Reset is described in Fig 9. Software Reset sequence 7.2.2 Device ID (PCA9670 ID field) The Device ID fi ...

... NXP Semiconductors Remark: If the master continues to ACK the bytes after the third byte, the PCA9670 rolls back to the first byte and keeps sending the Device ID sequence until a NACK has been detected. For the PCA9670, the Device shown in Fig 10. PCA9670 START condition ...

... NXP Semiconductors 8. I/O programming 8.1 Quasi-bidirectional I/O architecture The PCA9670’s 8 ports (see input or output ports. Input data is transferred from the ports to the microcontroller in the Read mode (see Figure 12). This quasi-bidirectional I/O can be used as an input or output without the use of a control signal for data directions ...

... NXP Semiconductors 8.3 Reading from a port (Input mode) All ports programmed as input should be set to logic 1. To read, the master (microcontroller) first addresses the slave device after it receives the interrupt. By setting the last bit of the byte containing the slave address to logic 1 the Read mode is entered. ...

... NXP Semiconductors 9. Characteristics of the I 2 The I C-bus is for 2-way, 2-line communication between different ICs or modules. The two lines are a serial data line (SDA) and a serial clock line (SCL). Both lines must be connected to a positive supply via a pull-up resistor when connected to the output stages of a device ...

... NXP Semiconductors 9.2 System configuration A device generating a message is a ‘transmitter'; a device receiving is the ‘receiver'. The device that controls the message is the ‘master' and the devices which are controlled by the master are the ‘slaves' (see SDA SCL MASTER TRANSMITTER/ RECEIVER Fig 16. System configuration 9 ...

... NXP Semiconductors 10. Application design-in information 10.1 Bidirectional I/O expander applications In the 8-bit I/O expander application shown in P7 are outputs. When used in this configuration, during a write, the input (P0 and P1) must be written as HIGH so the external devices fully control the input ports. The desired HIGH or LOW logic levels may be written to the I/Os used as outputs (P2 to P7) ...

... NXP Semiconductors 11. Limiting values Table 4. In accordance with the Absolute Maximum Rating System (IEC 60134). Symbol tot P/out T stg T amb [1] Total package (maximum) output current is 400 mA. PCA9670_2 Product data sheet Remote 8-bit I/O expander for Fm+ I Limiting values Parameter Conditions supply voltage ...

... NXP Semiconductors 12. Static characteristics Table 5. Static characteristics Symbol Parameter Supplies V supply voltage DD I supply current DD I standby current stb V power-on reset voltage POR Input SCL; input/output SDA V LOW-level input voltage IL V HIGH-level input voltage IH I LOW-level output current OL I leakage current ...

... NXP Semiconductors 13. Dynamic characteristics Table 6. Dynamic characteristics Symbol Parameter f SCL clock frequency SCL t bus free time between a BUF STOP and START condition t hold time (repeated) HD;STA START condition t set-up time for a repeated SU;STA START condition t set-up time for STOP SU;STO ...

... NXP Semiconductors [5] The maximum t for the SDA and SCL bus lines is specified at 300 ns. The maximum fall time for the SDA output stage t f 250 ns. This allows series protection resistors to be connected between the SDA and the SCL pins and the SDA/SCL bus lines without exceeding the maximum specifi ...

... NXP Semiconductors 14. Package outline HVQFN16: plastic thermal enhanced very thin quad flat package; no leads; 16 terminals; body 0.85 mm terminal 1 index area terminal 1 index area DIMENSIONS (mm are the original dimensions) (1) A UNIT max. 0.05 0. 0.2 0.00 0.18 Note 1. Plastic or metal protrusions of 0.075 mm maximum per side are not included. ...

... NXP Semiconductors SO16: plastic small outline package; 16 leads; body width 7 pin 1 index 1 e DIMENSIONS (inch dimensions are derived from the original mm dimensions) A UNIT max. 0.3 2.45 2.65 mm 0.25 0.1 2.25 0.012 0.096 0.1 inches 0.01 0.004 0.089 Note 1. Plastic or metal protrusions of 0.15 mm (0.006 inch) maximum per side are not included. ...

... NXP Semiconductors TSSOP16: plastic thin shrink small outline package; 16 leads; body width 4 pin 1 index 1 DIMENSIONS (mm are the original dimensions) A UNIT max. 0.15 0.95 mm 1.1 0.25 0.05 0.80 Notes 1. Plastic or metal protrusions of 0.15 mm maximum per side are not included. 2. Plastic interlead protrusions of 0.25 mm maximum per side are not included. ...

... NXP Semiconductors 15. Handling information Inputs and outputs are protected against electrostatic discharge in normal handling. However completely safe you must take normal precautions appropriate to handling integrated circuits. 16. Soldering This text provides a very brief insight into a complex technology. A more in-depth account of soldering ICs can be found in Application Note AN10365 “Surface mount reflow soldering description” ...

... NXP Semiconductors • Process issues, such as application of adhesive and flux, clinching of leads, board transport, the solder wave parameters, and the time during which components are exposed to the wave • Solder bath specifications, including temperature and impurities 16.4 Reflow soldering Key characteristics in reflow soldering are: • ...

... NXP Semiconductors Fig 25. Temperature profiles for large and small components For further information on temperature profiles, refer to Application Note AN10365 “Surface mount reflow soldering description” . 17. Abbreviations Table 9. Acronym CDM CMOS ESD GPIO HBM LED C-bus ID LSB MM MSB PLC RAID ...

... PCA9670_2 20070717 • Modifications: The format of this data sheet has been redesigned to comply with the new identity guidelines of NXP Semiconductors. • Legal texts have been adapted to the new company name where appropriate. • Table 1 “Ordering – changed Topside mark for PCA9670BS from “9670” to “670” ...

... For detailed and full information see the relevant full data sheet, which is available on request via the local NXP Semiconductors sales office. In case of any inconsistency or conflict with the short data sheet, the full data sheet shall prevail ...

... NXP Semiconductors 21. Contents 1 General description . . . . . . . . . . . . . . . . . . . . . . 1 2 Features . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1 3 Applications . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2 4 Ordering information . . . . . . . . . . . . . . . . . . . . . 2 5 Block diagram . . . . . . . . . . . . . . . . . . . . . . . . . . 2 6 Pinning information . . . . . . . . . . . . . . . . . . . . . . 3 6.1 Pinning . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3 6.2 Pin description . . . . . . . . . . . . . . . . . . . . . . . . . 4 7 Functional description . . . . . . . . . . . . . . . . . . . 5 7.1 Device address . . . . . . . . . . . . . . . . . . . . . . . . . 5 7.1.1 Address maps 7.2 Software Reset Call, and device ID addresses. 8 7.2.1 Software Reset . . . . . . . . . . . . . . . . . . . . . . . . . 8 7.2.2 Device ID (PCA9670 ID fi ...