PCA9672D,518 NXP Semiconductors, PCA9672D,518 Datasheet - Page 13

IC I/O EXPANDER I2C 8B 16SOIC

PCA9672D,518

Manufacturer Part Number
PCA9672D,518
Description
IC I/O EXPANDER I2C 8B 16SOIC
Manufacturer
NXP Semiconductors
Datasheet

Specifications of PCA9672D,518

Package / Case
16-SOIC (0.300", 7.5mm Width)
Interface
I²C
Number Of I /o
8
Interrupt Output
Yes
Frequency - Clock
1MHz
Voltage - Supply
2.3 V ~ 5.5 V
Operating Temperature
-40°C ~ 85°C
Mounting Type
Surface Mount
Includes
POR
Logic Family
PCA
Operating Supply Voltage
2.3 V to 5.5 V
Power Dissipation
400 mW
Operating Temperature Range
- 40 C to + 85 C
Mounting Style
SMD/SMT
Output Current
50 mA
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Lead Free Status / RoHS Status
Lead free / RoHS Compliant, Lead free / RoHS Compliant
Other names
568-4195-2
935282746518
PCA9672D-T
NXP Semiconductors
PCA9672_2
Product data sheet
Fig 17. System configuration
SDA
SCL
TRANSMITTER/
RECEIVER
MASTER
9.3 Acknowledge
The number of data bytes transferred between the START and the STOP conditions from
transmitter to receiver is not limited. Each byte of eight bits is followed by one
acknowledge bit. The acknowledge bit is a HIGH level put on the bus by the transmitter,
whereas the master generates an extra acknowledge related clock pulse.
A slave receiver which is addressed must generate an acknowledge after the reception of
each byte. Also a master must generate an acknowledge after the reception of each byte
that has been clocked out of the slave transmitter. The device that acknowledges has to
pull down the SDA line during the acknowledge clock pulse, so that the SDA line is stable
LOW during the HIGH period of the acknowledge related clock pulse; set-up and hold
times must be taken into account.
A master receiver must signal an end of data to the transmitter by not generating an
acknowledge on the last byte that has been clocked out of the slave. In this event, the
transmitter must leave the data line HIGH to enable the master to generate a STOP
condition.
Fig 18. Acknowledgement on the I
RECEIVER
SLAVE
SCL from master
by transmitter
data output
by receiver
data output
Remote 8-bit I/O expander for Fm+ I
TRANSMITTER/
RECEIVER
Rev. 02 — 6 July 2007
condition
START
SLAVE
S
2
C-bus
TRANSMITTER
1
MASTER
2
TRANSMITTER/
RECEIVER
MASTER
acknowledgement
2
not acknowledge
C-bus with interrupt and reset
SLAVE
clock pulse for
acknowledge
8
MULTIPLEXER
PCA9672
© NXP B.V. 2007. All rights reserved.
002aaa987
I
2
9
C-BUS
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