IC I/O EXPANDER I2C 8B 16SOIC

PCA9672D,512

Manufacturer Part NumberPCA9672D,512
DescriptionIC I/O EXPANDER I2C 8B 16SOIC
ManufacturerNXP Semiconductors
PCA9672D,512 datasheet
 


Specifications of PCA9672D,512

InterfaceI²CNumber Of I /o8
Interrupt OutputYesFrequency - Clock1MHz
Voltage - Supply2.3 V ~ 5.5 VOperating Temperature-40°C ~ 85°C
Mounting TypeSurface MountPackage / Case16-SOIC (0.300", 7.5mm Width)
IncludesPORLead Free Status / RoHS StatusLead free / RoHS Compliant
Other names935282746512
PCA9672D
PCA9672D
  
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PCA9672
Remote 8-bit I/O expander for Fm+ I
reset
Rev. 02 — 6 July 2007
1. General description
The PCA9672 provides general purpose remote I/O expansion for most microcontroller
families via the two-line bidirectional bus (I
family.
The PCA9672 is a drop-in upgrade for the PCF8574 providing higher Fast-mode Plus
(Fm+) I
dimming of LEDs, higher I
can be on the bus without the need for bus buffers, higher total package sink capacity
(200 mA versus 100 mA) that supports having all LEDs on at the same time and more
device addresses (16 versus 8) are available to allow many more devices on the bus
without address conflicts.
The difference between the PCA9672 and the PCF8574 is that the A2 address pin is
replaced by the RESET input on the PCA9672.
The device consists of an 8-bit quasi-bidirectional port and an I
PCA9672 has low current consumption and include latched outputs with 25 mA high
current drive capability for directly driving LEDs.
The PCA9672 possesses an interrupt line (INT) that can be connected to the interrupt
logic of the microcontroller. By sending an interrupt signal on this line, the remote I/O can
inform the microcontroller if there is incoming data on its ports without having to
communicate via the I
The internal Power-On Reset (POR), hardware reset pin (RESET), or Software Reset
sequence initializes the I/Os as inputs.
2. Features
I
1 MHz I
I
Compliant with the I
I
SDA with 30 mA sink capability for 4000 pF buses
I
2.3 V to 5.5 V operation with 5.5 V tolerant I/Os
I
8-bit remote I/O pins that default to inputs at power-up
I
Latched outputs with 25 mA sink capability for directly driving LEDs
I
Total package sink capability of 200 mA
I
Active LOW open-drain interrupt output
I
16 programmable slave addresses using 2 address pins
I
Readable device ID (manufacturer, device type, and revision)
2
C-bus speeds (1 MHz versus 400 kHz) so that the output can support PWM
2
C-bus drive (30 mA versus 3 mA) so that many more devices
2
C-bus.
2
C-bus interface
2
C-bus Fast and Standard modes
2
C-bus with interrupt and
Product data sheet
2
C-bus) and is a part of the Fast-mode Plus
2
C-bus interface. The

PCA9672D,512 Summary of contents

  • Page 1

    PCA9672 Remote 8-bit I/O expander for Fm+ I reset Rev. 02 — 6 July 2007 1. General description The PCA9672 provides general purpose remote I/O expansion for most microcontroller families via the two-line bidirectional bus (I family. The PCA9672 is ...

  • Page 2

    ... NXP Semiconductors I Low standby current +85 C operation I ESD protection exceeds 2000 V HBM per JESD22-A114, 200 V MM per JESD22-A115, and 1000 V CDM per JESD22-C101 I Latch-up testing is done to JEDEC standard JESD78 which exceeds 100 mA I Packages offered: SO16, TSSOP16, HVQFN16 3. Applications I LED signs and displays ...

  • Page 3

    ... NXP Semiconductors 5. Block diagram INT AD0 AD1 SCL SDA RESET Fig 1. Block diagram of PCA9672 data from Shift Register data to Shift Register Fig 2. Simplified schematic diagram PCA9672_2 Product data sheet Remote 8-bit I/O expander for Fm+ I PCA9672 INTERRUPT LOGIC 2 INPUT I C-BUS ...

  • Page 4

    ... NXP Semiconductors 6. Pinning information 6.1 Pinning RESET Fig 3. Pin configuration for SO16 Fig 5. Pin configuration for HVQFN16 6.2 Pin description Table 2. Symbol AD0 AD1 RESET PCA9672_2 Product data sheet Remote 8-bit I/O expander for Fm AD0 V DD AD1 2 15 SDA ...

  • Page 5

    ... NXP Semiconductors Table 2. Symbol P7 INT SCL SDA V DD [1] HVQFN package die supply ground is connected to both the V pin must be connected to supply ground for proper device operation. For enhanced thermal, electrical, and board-level performance, the exposed pad needs to be soldered to the board using a corresponding thermal pad on the board, and for proper heat conduction through the board thermal vias need to be incorporated in the PCB in the thermal pad region ...

  • Page 6

    ... NXP Semiconductors 7.1.1 Address map Table 3. AD1 SCL SCL SDA SDA SCL SCL SDA SDA 7.2 Software Reset Call, and device ID addresses Two other different addresses can be sent to the PCA9672. • General Call address: allows to reset the PCA9672 through the I reception of the right I information. • ...

  • Page 7

    ... NXP Semiconductors 7.2.1 Software Reset The Software Reset Call allows all the devices in the I state value through a specific formatted I implies that the I The Software Reset sequence is defined as following START command is sent by the I 2. The reserved General Call I is sent by the I 3. The PCA9672 device(s) acknowledge(s) after seeing the General Call address ‘ ...

  • Page 8

    ... NXP Semiconductors 7.2.2 Device ID (PCA9672 ID field) The Device ID field is a 3-byte read-only (24 bits) word giving the following information: • 8 bits with the manufacturer name, unique per manufacturer (for example, NXP). • 13 bits with the part identification, assigned by manufacturer, the 7 MSBs with the category ID and the 6 LSBs with the feature ID (for example, for example PCA9672 8-bit quasi-output I/O expander) ...

  • Page 9

    ... NXP Semiconductors S 1 START condition M7 manufacturer name = 00000000 Fig 11. Device ID field reading 8. I/O programming 8.1 Quasi-bidirectional I/O architecture The PCA9672’s 8 ports (see input or output ports. Input data is transferred from the ports to the microcontroller in the Read mode (see Figure 12). This quasi-bidirectional I/O can be used as an input or output without the use of a control signal for data directions ...

  • Page 10

    ... NXP Semiconductors SCL slave address SDA START condition write to port data output from port P5 output voltage P5 pull-up output current INT Fig 12. Write mode (output) 8.3 Reading from a port (Input mode) All ports programmed as input should be set to logic 1. To read, the master (microcontroller) fi ...

  • Page 11

    ... NXP Semiconductors 8.4 Power-on reset When power is applied reset condition until V and the PCA9672 registers and I states. Thereafter V 8.5 Interrupt output (INT) The PCA9672 provides an open-drain interrupt (INT) which can be fed to a corresponding input of the microcontroller (see chips a kind of master function which can initiate an action elsewhere in the system. ...

  • Page 12

    ... NXP Semiconductors 9. Characteristics of the I 2 The I C-bus is for 2-way, 2-line communication between different ICs or modules. The two lines are a serial data line (SDA) and a serial clock line (SCL). Both lines must be connected to a positive supply via a pull-up resistor when connected to the output stages of a device ...

  • Page 13

    ... NXP Semiconductors SDA SCL MASTER TRANSMITTER/ RECEIVER Fig 17. System configuration 9.3 Acknowledge The number of data bytes transferred between the START and the STOP conditions from transmitter to receiver is not limited. Each byte of eight bits is followed by one acknowledge bit. The acknowledge bit is a HIGH level put on the bus by the transmitter, whereas the master generates an extra acknowledge related clock pulse ...

  • Page 14

    ... NXP Semiconductors 10. Application design-in information 10.1 Bidirectional I/O expander applications In the 8-bit I/O expander application shown in P7 are outputs. When used in this configuration, during a write, the input (P0 and P1) must be written as HIGH so the external devices fully control the input ports. The desired HIGH or LOW logic levels may be written to the I/Os used as outputs (P2 to P7) ...

  • Page 15

    ... NXP Semiconductors 11. Limiting values Table 4. In accordance with the Absolute Maximum Rating System (IEC 60134). Symbol tot P/out T stg T amb [1] Total package (maximum) output current is 400 mA. 12. Static characteristics Table 5. Static characteristics Symbol Parameter Supplies V supply voltage DD I supply current ...

  • Page 16

    ... NXP Semiconductors Table 5. Static characteristics Symbol Parameter I/Os LOW-level output current OL I total LOW-level output current OL(tot) I HIGH-level output current OH I transient boosted pull-up current V trt(pu) C input capacitance i C output capacitance o Input RESET V LOW-level input voltage IL V HIGH-level input voltage ...

  • Page 17

    ... NXP Semiconductors 13. Dynamic characteristics Table 6. Dynamic characteristics Symbol Parameter f SCL clock frequency SCL t bus free time between a BUF STOP and START condition t hold time (repeated) HD;STA START condition t set-up time for a repeated SU;STA START condition t set-up time for STOP SU;STO ...

  • Page 18

    ... NXP Semiconductors [ total capacitance of one bus line in pF. b [4] A master device must internally provide a hold time of at least 300 ns for the SDA signal (refer to the V bridge the undefined region SCL’s falling edge. [5] The maximum t for the SDA and SCL bus lines is specified at 300 ns. The maximum fall time for the SDA output stage t f 250 ns ...

  • Page 19

    ... NXP Semiconductors 14. Package outline HVQFN16: plastic thermal enhanced very thin quad flat package; no leads; 16 terminals; body 0.85 mm terminal 1 index area terminal 1 index area DIMENSIONS (mm are the original dimensions) (1) A UNIT max. 0.05 0. 0.2 0.00 0.18 Note 1. Plastic or metal protrusions of 0.075 mm maximum per side are not included. ...

  • Page 20

    ... NXP Semiconductors SO16: plastic small outline package; 16 leads; body width 7 pin 1 index 1 e DIMENSIONS (inch dimensions are derived from the original mm dimensions) A UNIT max. 0.3 2.45 2.65 mm 0.25 0.1 2.25 0.012 0.096 0.1 inches 0.01 0.004 0.089 Note 1. Plastic or metal protrusions of 0.15 mm (0.006 inch) maximum per side are not included. ...

  • Page 21

    ... NXP Semiconductors TSSOP16: plastic thin shrink small outline package; 16 leads; body width 4 pin 1 index 1 DIMENSIONS (mm are the original dimensions) A UNIT max. 0.15 0.95 mm 1.1 0.25 0.05 0.80 Notes 1. Plastic or metal protrusions of 0.15 mm maximum per side are not included. 2. Plastic interlead protrusions of 0.25 mm maximum per side are not included. ...

  • Page 22

    ... NXP Semiconductors 15. Handling information Inputs and outputs are protected against electrostatic discharge in normal handling. However completely safe you must take normal precautions appropriate to handling integrated circuits. 16. Soldering This text provides a very brief insight into a complex technology. A more in-depth account of soldering ICs can be found in Application Note AN10365 “Surface mount reflow soldering description” ...

  • Page 23

    ... NXP Semiconductors • Process issues, such as application of adhesive and flux, clinching of leads, board transport, the solder wave parameters, and the time during which components are exposed to the wave • Solder bath specifications, including temperature and impurities 16.4 Reflow soldering Key characteristics in reflow soldering are: • ...

  • Page 24

    ... NXP Semiconductors Fig 26. Temperature profiles for large and small components For further information on temperature profiles, refer to Application Note AN10365 “Surface mount reflow soldering description” . 17. Abbreviations Table 9. Acronym CDM CMOS ESD GPIO HBM LED C-bus ID LSB MM MSB PLC PWM ...

  • Page 25

    ... NXP Semiconductors 18. Revision history Table 10. Revision history Document ID Release date PCA9672_2 20070706 • Modifications: The format of this data sheet has been redesigned to comply with the new identity guidelines of NXP Semiconductors. • Legal texts have been adapted to the new company name where appropriate. ...

  • Page 26

    ... For detailed and full information see the relevant full data sheet, which is available on request via the local NXP Semiconductors sales office. In case of any inconsistency or conflict with the short data sheet, the full data sheet shall prevail ...

  • Page 27

    ... NXP Semiconductors 21. Contents 1 General description . . . . . . . . . . . . . . . . . . . . . . 1 2 Features . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1 3 Applications . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2 4 Ordering information . . . . . . . . . . . . . . . . . . . . . 2 5 Block diagram . . . . . . . . . . . . . . . . . . . . . . . . . . 3 6 Pinning information . . . . . . . . . . . . . . . . . . . . . . 4 6.1 Pinning . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4 6.2 Pin description . . . . . . . . . . . . . . . . . . . . . . . . . 4 7 Functional description . . . . . . . . . . . . . . . . . . . 5 7.1 Device address . . . . . . . . . . . . . . . . . . . . . . . . . 5 7.1.1 Address map 7.2 Software Reset Call, and device ID addresses . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6 7.2.1 Software Reset . . . . . . . . . . . . . . . . . . . . . . . . . 7 7.2.2 Device ID (PCA9672 ID fi ...