MCP25055T-I/SL Microchip Technology, MCP25055T-I/SL Datasheet - Page 46

• Manufacturer Part Number: MCP25055T-I/SL
• Description: IC I/O EXPANDER CAN 8B 14SOIC
• Manufacturer: Microchip Technology

Specifications of MCP25055T-I/SL

• Package / Case: 14-SOIC (3.9mm Width), 14-SOL
• Interface: 1-Wire, CAN
• Number Of I /o: 8
• Interrupt Output: No
• Frequency - Clock: 4MHz
• Voltage - Supply: 2.7 V ~ 5.5 V
• Operating Temperature: -40°C ~ 85°C
• Mounting Type: Surface Mount
• Includes: ADC, Memory, PWM
• Product: Controller Area Network (CAN)
• Number Of Transceivers: 1
• Data Rate: 1 Mbps
• Supply Voltage (max): 5.5 V
• Supply Voltage (min): 2.7 V
• Supply Current (max): 20 mA
• Maximum Operating Temperature: + 150 C
• Minimum Operating Temperature: - 65 C
• Mounting Style: SMD/SMT
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Other names: MCP25055TI/SL

MCP2502X/5X
REGISTER 7-9:
TABLE 7-2:
DS21664D-page 46
Addr
1Eh
34h
00h
01h
0Eh
0Fh
2Ch
2Dh
2Eh
2Fh
30h
31h
32h
33h
10h
GPDDR *
ADCON0
ADCON1
ADCMP3
ADCMP3
ADCMP2
ADCMP2
ADCMP1
ADCMP1
ADCMP0
ADCMP0
IOINTEN
IOINTPO
*
STCON
GPPIN
Name
bit 7-6
bit 5-4
bit 3-2
bit 1-0
The GPDDR register controls the direction of the GPIO pins, even when they are being used as analog inputs. The user must ensure
that the bits in the GPDDR register are maintained set (input) when using them as analog inputs
GP7TXC
GP7POL
AN3CM
AN3CM
AN2CM
AN2CM
AN1CM
AN1CM
AN0CM
AN0CM
ADCS1
REGISTERS ASSOCIATED WITH THE A/D MODULE
ADON
STEM
GP7
bit7
—
A/D OM RESULT REGISTER (AN10L)
AN1R.1:AN1R.0: A/D Channel 1, bits 1:0 results
Unimplemented: Reads as ‘0’
AN0R.1:AN0R.0: A/D Channel 0, bits 1:0 results
Unimplemented: Reads as ‘0’
Legend:
R = Readable bit
- n = Value at POR
bit 7
AN1R.1
AN3CMP.
AN3CMP.
AN2CMP.
AN2CMP.
AN1CMP.
AN1CMP.
AN0CMP.
AN0CMP.
GP6TXC
GP6POL
R-x
ADCS0
T0PS2
DDR6
STMS
GP6
bit6
AN3CMP.
AN2CMP.
AN1CMP.
AN0CMP.
GP5TXC
GP5POL
AN1R.0
VCFG1
STBF1
T0PS1
DDR5
GP5
bit5
R-x
—
—
—
—
AN3CMP.
AN2CMP.
AN1CMP.
AN0CMP.
GP4TXC
GP4POL
VCFG0
T0PS0
STBF0
DDR4
GP4
bit4
—
—
—
—
U-x
—
W = Writable bit
‘1’ = Bit is set
AN3CMP.5 AN3CMP.4
AN2CMP.5 AN2CMP.4
AN1CMP.5 AN1CMP.4
AN0CMP.5 AN0CMP.4
GO/DONE
GP3POL
GP3TXC
PCFG3
DDR3
STM3
GP3
bit3
U-x
—
Reserved
Reserved
Reserved
Reserved
GP2TXC
GP2POL
PCFG2
DDR2
STM2
GP2
bit2
—
AN0R.1
U = Unimplemented bit, read as ‘0’
‘0’ = Bit is cleared
R-x
AN3CMP.
AN2CMP.
AN1CMP.
AN0CMP.
GP1TXC
GP1POL
PCFG1
DDR1
CHS1
STM1
GP1
bit1
AN0R.0
AN3CMP2 xxxx xxxx uuuu uuuu
AN2CMP2 xxxx xxxx uuuu uuuu
AN1CMP2 xxxx xxxx uuuu uuuu
AN0CMP2 xxxx xxxx uuuu uuuu
.
GP0TXC
GP0POL
R-x
© 2007 Microchip Technology Inc.
PCFG0
ADPOL
ADPOL
ADPOL
DDR0
CHS0
STM0
GP0
bit0
—
x = Bit is unknown
0000 0000 0000 0000
-111 1111 -111 1111
0000 0000 0000 0000
0000 0000 0000 0000
0000 0-00 0000 0-00
0000 0000 0000 0000
xx-- ---- uu-- ----
xx-- ---- uu-- ----
xx-- ---- uu-- ----
xx-- ---- uu-- ----
0xxx xxxx 0uuu uuuu
Value on
U-x
POR
—
Value on
U-x
RST
—
bit 0