LMH0071SQ/NOPB National Semiconductor, LMH0071SQ/NOPB Datasheet

IC DESERIAL SDI W/LVDS 48LLP

LMH0071SQ/NOPB

Manufacturer Part Number
LMH0071SQ/NOPB
Description
IC DESERIAL SDI W/LVDS 48LLP
Manufacturer
National Semiconductor
Series
LMH®r
Datasheet

Specifications of LMH0071SQ/NOPB

Function
Deserializer
Data Rate
3Gbps
Input Type
LVCMOS
Output Type
LVCMOS
Number Of Inputs
2
Number Of Outputs
5
Voltage - Supply
2.375 V ~ 2.625 V
Operating Temperature
-40°C ~ 85°C
Mounting Type
Surface Mount
Package / Case
48-LLP
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Other names
LMH0071SQ
© 2010 National Semiconductor Corporation
3 Gbps, HD, SD, DVB-ASI SDI Deserializer with
Loopthrough and LVDS Interface
General Description
The LMH0341/0041/0071/0051 SDI Deserializers are part of
National’s family of FPGA-Attach SER/DES products sup-
porting 5-bit LVDS interfaces with FPGAs. When paired with
a host FPGA the LMH0341 automatically detects the incom-
ing data rate and decodes the raw 5-bit data words compliant
to any of the following standards: DVB-ASI, SMPTE 259M,
SMPTE 292M, or SMPTE 424M. See
which Standards are supported per device.
The interface between the LMH0341 and the host FPGA con-
sists of a 5-bit wide LVDS bus, an LVDS clock and an SMBus
interface. No external VCOs or clocks are required. The
LMH0341 CDR detects the frequency from the incoming data
stream, generates a clean clock and transmits both clock and
data to the host FPGA. The LMH0341, LMH0041 and
LMH0071 include a serial reclocked loopthrough with inte-
grated SMPTE compliant cable driver. Refer to table 1 for a
complete listing of single channel deserializers offered in this
family.
The FPGA-Attach SER/DES product family is supported by a
suite of IP which allows the design engineer to quickly develop
video applications using the SER/DES products. The product
is packaged in a physically small 48 pin LLP package.
General Block Diagram
TRI-STATE
®
is a registered trademark of National Semiconductor Corporation.
Table 1
300172
LMH0341, LMH0041,
LMH0071, LMH0051
for details on
Key Specifications
Features
Applications
Output compliant with SMPTE 259M-C, SMPTE 292M,
SMPTE 424M and DVB-ASI (See Table 1)
Typical power dissipation: 590 mW (loopthrough disabled,
3G datarate)
0.6 UI Minimum Input Jitter Tolerance
5–bit LVDS Interface
No external VCO or clock required
Reclocked serial loopthrough with Cable Driver
Powerdown Mode
3.3V SMBus configuration interface
Small 48 pin LLP package
Industrial Temperature range:-40°C to +85°C
SDI interfaces for:
— Video Cameras
— DVRs
— Video Switchers
— Video Editing Systems
December 16, 2010
30017201
www.national.com

Related parts for LMH0071SQ/NOPB

LMH0071SQ/NOPB Summary of contents

Page 1

... IP which allows the design engineer to quickly develop video applications using the SER/DES products. The product is packaged in a physically small 48 pin LLP package. General Block Diagram TRI-STATE ® registered trademark of National Semiconductor Corporation. © 2010 National Semiconductor Corporation LMH0341, LMH0041, LMH0071, LMH0051 Key Specifications ■ ...

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Pin Descriptions Pin Name Type LVDS Input Interface RX[4:0]+ Output, LVDS RX[4:0]- RXCLK+ Output, LVDS RXCLK- Serial Data Inputs RXIN + Input, Differential 0 RXIN - 0 RXIN + Input, Differential 1 RXIN - 1 Loopthrough Serial Output TXOUT+ Output, ...

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Pin Name Type Analog Inputs R Input SET LF_CP Input LF_REF DNC Power Supply and Ground V Power DD3V3 V Power DDPLL V Power DD2V5 GND Ground Device SMPTE 424M Support SMPTE 292M Support SMPTE 259M Support DVB-ASI Support Active ...

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... Absolute Maximum Ratings If Military/Aerospace specified devices are required, please contact the National Semiconductor Sales Office/ Distributors for availability and specifications. Supply Voltage (V ) DD3V3 Supply Voltage(V ) DD2V5 LVCMOS input voltage LVCMOS output voltage SMBus I/O Voltage Recommended Operating Conditions Parameter Supply Voltage (V ...

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Electrical Characteristics Over supply and Operating Temperature ranges unless otherwise specified. Symbol Parameter I 2.5V supply current for LMH0341, DD2.5 LMH041, LMH0071 2.5V supply current for LMH0051 I 3.3V supply current for LMH0341, DD3.3 LMH0041, LMH0071 3.3V supply current for ...

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SDI Input Electrical Characteristics Over supply and Operating Temperature ranges unless otherwise specified. Symbol Parameter V Input Differential Voltage ID I Input Current IN R Input Termination IT TOL Input Jitter Tolerance JIT λ Jitter Transfer Function ...

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LVDS Output Electrical Characteristics Over supply and Operating Temperature ranges unless otherwise specified. Symbol Parameter V Differential Output Voltage OD ΔV Change in V between OD OD complementary output states V Offset Voltage OS ΔV Change in V between OS ...

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SMBus Input Electrical Characteristics Over supply and Operating Temperature ranges unless otherwise specified. Symbol Parameter V Data, Clock Input Low Voltage SIL V Data, Clock Input High Voltage SIH V Nominal Bus Voltage SDD V Output Low voltage OL I ...

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SDI Output Switching Characteristics (LMH0341 / LMH0041 / LMH0071) Over supply and Operating Temperature ranges unless otherwise specified. Symbol Parameter SDI Output Datarate t SDI Output Rise Time r t SDI Output Fall Time f Δt Mismatch between Rise and ...

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FIGURE 3. Receiver (LVDS Interface) Propagation Delay www.national.com 10 30017204 ...

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... In most applications, the input data to the DES will be data compliant with DVB ASI, SMPTE 259M-C, SMPTE 292M or SMPTE 424M, and the decoding will be done by the IP provided by National Semiconductor or similar IP to result in a decoded output. National Semicon- ductor offers IP in source code format to perform the appro- priate decoding of the data, as well as evaluation platforms to assist in the development of target applications ...

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FIGURE 4. Simplified SDI Input Circuit SWITCHING SDI INPUTS When the input to the DES is switched from one source to another, either via the internal 2:1 multiplexor on the inputs, or via an external crosspoint switch, there are a ...

Page 13

FIGURE 6. Jitter Tolerance Curve FIGURE 7. Jitter Transfer Curve Parameters FIGURE 8. Jitter Transfer Curve SMBus INTERFACE The configuration bus conforms to the System Management Bus (SMBus) 2.0 specification. SMBus 2.0 includes multiple options. The optional ARP (Address Resolution ...

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FIGURE 9. SMBus Configuration 1 — Host to single device FIGURE 10. SMBus Configuration 2 — Host to multiple devices with SMB_CS signals FIGURE 11. SMBus Configuration 3 — Host to multiple devices with multiple SMBus Interfaces www.national.com 30017215 14 ...

Page 15

GENERAL PURPOSE I/O PINS (GPIO) The DES has three pins which can be configured to provide direct access to certain register values via a dedicated pin. For example if a particular application required fast action to the condition of the ...

Page 16

Application Information PCB LAYOUT RECOMMENDATIONS In almost all applications, the inputs to the DES will be driven by the output of an equalizer such as the LMH0044. You should follow the recommendations on the equalizer datasheet for the interface between ...

Page 17

SMPTE standards require. The output voltage amplitude of the cable driver is set by the R resistor. For single-ended SET applications, an 7.87kΩ resistor is connected between this pin and ground to set the swing to 800mV. The PLL loop ...

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FIGURE 16. Typical CML Application Circuit (LMH0051) www.national.com 18 30017218 ...

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Register Descriptions the following table provides details on the device's configura- tion registers. DES Register Detail Table ADD 'h Name Bits Field 00 device_identifica The seven MSBs of this register define the SMBus address for the device. The default value ...

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ADD 'h Name Bits 04 GPIO_2 This register configures GPIO_2. Note, if this pin used as an input, then the output must be Configuration TRI-STATE (bit[0]=’0’) and if used as an output, then the input buffer must ...

Page 21

ADD 'h Name Bits Field 20 Control 7:3 Reserved 2 Data Order 1 Reset Channel 0 Digital Powerdown 21 DVB_ASI This register allows the device to be placed in DVB_ASI mode or standard operation mode 7:5 Reserved 4 RX_MUX_SEL 3:2 ...

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ADD 'h Name Bits 2B Event Allows control over the counting of error events on the clock recovery PLL Configuration 7 Reserved 2D Error Monitor Controls Error Monitoring functions 7 ...

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ADD 'h Name Bits Field 3C CDR Lock Status 7:4 Reserved 3 CDR Lock 2 Signal Detect Signal Detect Reserved 3D Event Status Error Counting register 7:0 event count 3E Error Status 1 Error ...

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Connection Diagrams FIGURE 17. Connection Diagram for LMH0341 / LMH0041 / LMH0071 www.national.com 24 30017211 ...

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FIGURE 18. Connection Diagram for LMH0051 25 30017212 www.national.com ...

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Ordering Information NSID Speed LMH0341SQ LMH0341SQX LMH0341SQE LMH0041SQ LMH0041SQX LMH0041SQE LMH0071SQ SD LMH0071SQX LMH0071SQE LMH0051SQ LMH0051SQX LMH0051SQE www.national.com Feature Units per T&R SMPTE, Loopthrough 1,000 2,500 250 SMPTE, Loopthrough ...

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Physical Dimensions inches (millimeters) unless otherwise noted 48-Lead QFN Plastic Quad Package NS Package Number SQA48A 27 www.national.com ...

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... For more National Semiconductor product information and proven design tools, visit the following Web sites at: www.national.com Products Amplifiers www.national.com/amplifiers Audio www.national.com/audio Clock and Timing www.national.com/timing Data Converters www.national.com/adc Interface www.national.com/interface LVDS www.national.com/lvds Power Management www.national.com/power Switching Regulators www.national.com/switchers LDOs www.national.com/ldo LED Lighting www ...

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