PCA9516AD,118 NXP Semiconductors, PCA9516AD,118 Datasheet
PCA9516AD,118
Specifications of PCA9516AD,118
935275882118
PCA9516AD-T
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PCA9516AD,118 Summary of contents
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PCA9516A 5-channel I Rev. 03 — 23 April 2009 1. General description The PCA9516A is a CMOS integrated circuit intended for application in I SMBus systems. While retaining all the operating modes and features of the I extension of the ...
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... NXP Semiconductors 400 kHz clock frequency I ESD protection exceeds 2000 V HBM per JESD22-A114, 200 V MM per JESD22-A115, and 1000 V CDM per JESD22-C101 I Latch-up testing is done to JEDEC Standard JESD78 which exceeds 100 mA I Packages offered: SO16 and TSSOP16 3. Ordering information Table 1. Type number ...
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... NXP Semiconductors 4. Block diagram SCL0 SCL1 SCL2 SDA0 SDA1 SDA2 EN1 EN2 Fig 1. Block diagram A more detailed view of Fig 2. The output pull-down of each internal buffer is set for approximately 0.5 V, while the input threshold of each internal buffer is set about 0.07 V lower, when the output is internally driven LOW ...
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... NXP Semiconductors 5. Pinning information 5.1 Pinning Fig 3. 5.2 Pin description Table 3. Symbol SCL0 SDA0 SCL1 SDA1 EN1 SCL2 SDA2 GND EN2 SCL3 SDA3 EN3 SCL4 SDA4 EN4 V CC PCA9516A_3 Product data sheet 1 16 SCL0 SDA0 EN4 SCL1 3 14 SDA4 SDA1 4 13 ...
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... NXP Semiconductors 6. Functional description The PCA9516A is a five-way hub repeater, which enables I systems to be expanded with only one repeater delay and no functional degradation of system performance. The PCA9516A contains five bidirectional, open-drain buffers specifically designed to support the standard low-level-contention arbitration of the I arbitration or clock stretching, the PCA9516A acts like fi ...
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... NXP Semiconductors The PCA9516A is 5.5 V tolerant so it does not require any additional circuitry to translate between the different bus voltages. When one side of the PCA9516A is pulled LOW by a device on the I hysteresis type input detects the falling edge and causes an internal driver on the other side to turn on, thus causing the other side to also go LOW ...
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... NXP Semiconductors SCL SDA V of master OL Fig 6. Bus 0 waveform SCL SDA Fig 7. Bus 1 waveform 8. Limiting values Table 4. In accordance with the Absolute Maximum Rating System (IEC 60134). Voltages with respect to GND. Symbol bus I P tot T stg T amb PCA9516A_3 Product data sheet ...
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... NXP Semiconductors 9. Static characteristics Table 5. Static characteristics ( GND = Symbol Parameter Supplies V supply voltage CC I HIGH-level supply current CCH I LOW-level supply current CCL I contention LOW-level supply current CCLc Input SCLn; input/output SDAn V HIGH-level input voltage IH V LOW-level input voltage IL V contention LOW-level input voltage ...
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... NXP Semiconductors Table 6. Static characteristics ( GND = Symbol Parameter Supplies V supply voltage CC I HIGH-level supply current CCH I LOW-level supply current CCL I contention LOW-level supply current CCLc Input SCLn; input/output SDAn V HIGH-level input voltage IH V LOW-level input voltage IL V contention LOW-level input voltage ...
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... NXP Semiconductors 10. Dynamic characteristics Table 7. Dynamic characteristics ( 2 2.7 V; GND = Symbol Parameter t HIGH to LOW propagation delay PHL t LOW to HIGH propagation delay PLH t HIGH to LOW output transition time THL t LOW to HIGH output transition time TLH t set-up time su t hold time h [1] Typical value taken at 2.5 V and 25 C. ...
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... NXP Semiconductors 11. Test information Fig 9. PCA9516A_3 Product data sheet PULSE GENERATOR R = load resistor; 1. load capacitance includes jig and probe capacitance termination resistance should be equal Test circuit for open-drain outputs Rev. 03 — 23 April 2009 PCA9516A 5-channel DUT 002aad479 of pulse generators C-bus hub © ...
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... NXP Semiconductors 12. Package outline SO16: plastic small outline package; 16 leads; body width 3 pin 1 index 1 DIMENSIONS (inch dimensions are derived from the original mm dimensions) A UNIT max. 0.25 1.45 mm 1.75 0.25 0.10 1.25 0.010 0.057 inches 0.069 0.01 0.004 0.049 Note 1. Plastic or metal protrusions of 0.15 mm (0.006 inch) maximum per side are not included. ...
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... NXP Semiconductors TSSOP16: plastic thin shrink small outline package; 16 leads; body width 4 pin 1 index 1 DIMENSIONS (mm are the original dimensions) A UNIT max. 0.15 0.95 mm 1.1 0.25 0.05 0.80 Notes 1. Plastic or metal protrusions of 0.15 mm maximum per side are not included. 2. Plastic interlead protrusions of 0.25 mm maximum per side are not included. ...
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... NXP Semiconductors 13. Soldering of SMD packages This text provides a very brief insight into a complex technology. A more in-depth account of soldering ICs can be found in Application Note AN10365 “Surface mount reflow soldering description” . 13.1 Introduction to soldering Soldering is one of the most common methods through which packages are attached to Printed Circuit Boards (PCBs), to form electrical circuits ...
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... NXP Semiconductors 13.4 Reflow soldering Key characteristics in reflow soldering are: • Lead-free versus SnPb soldering; note that a lead-free reflow process usually leads to higher minimum peak temperatures (see reducing the process window • Solder paste printing issues including smearing, release, and adjusting the process window for a mix of large and small components on one board • ...
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... NXP Semiconductors Fig 12. Temperature profiles for large and small components For further information on temperature profiles, refer to Application Note AN10365 “Surface mount reflow soldering description” . 14. Abbreviations Table 11. Acronym CDM CMOS DUT ESD HBM 2 I C-bus MM RC SMBus PCA9516A_3 Product data sheet ...
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... Release date PCA9516A_3 20090423 • Modifications: The format of this data sheet has been redesigned to comply with the new identity guidelines of NXP Semiconductors. • Legal texts have been adapted to the new company name where appropriate. • Section 1 “General “PCA951x” to “PCA951xA” ...
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... Right to make changes — NXP Semiconductors reserves the right to make changes to information published in this document, including without limitation specifications and product descriptions, at any time and without notice ...
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... NXP Semiconductors 18. Contents 1 General description . . . . . . . . . . . . . . . . . . . . . . 1 2 Features . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1 3 Ordering information . . . . . . . . . . . . . . . . . . . . . 2 3.1 Ordering options . . . . . . . . . . . . . . . . . . . . . . . . 2 4 Block diagram . . . . . . . . . . . . . . . . . . . . . . . . . . 3 5 Pinning information . . . . . . . . . . . . . . . . . . . . . . 4 5.1 Pinning . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4 5.2 Pin description . . . . . . . . . . . . . . . . . . . . . . . . . 4 6 Functional description . . . . . . . . . . . . . . . . . . . 5 6.1 Enable 6.2 I C-bus systems . . . . . . . . . . . . . . . . . . . . . . . . 5 7 Application design-in information . . . . . . . . . . 5 8 Limiting values Static characteristics Dynamic characteristics ...