SLXT914QC.B3 Intel, SLXT914QC.B3 Datasheet - Page 11

IC QUAD ETHERNET REPEATER 100QFP

SLXT914QC.B3

Manufacturer Part Number
SLXT914QC.B3
Description
IC QUAD ETHERNET REPEATER 100QFP
Manufacturer
Intel
Type
Repeaterr
Datasheet

Specifications of SLXT914QC.B3

Rohs Status
RoHS non-compliant
Tx/rx Type
Ethernet
Voltage - Supply
4.75 V ~ 5.25 V
Current - Supply
180mA
Mounting Type
Surface Mount
Package / Case
100-QFP
Delay Time
-
Capacitance - Input
-
Other names
831521

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
SLXT914QC.B3
Manufacturer:
Intel
Quantity:
10 000
Table 4.
Table 5.
Datasheet
Serial Port Signal Descriptions (External Management Mode)
Serial Port Signal Descriptions (Local Management Mode)
PLCC PQFP
PLCC PQFP
14
15
16
17
18
14
15
16
17
18
11
12
13
14
16
12
13
14
16
11
SCLKIO
Symbol
Symbol
SENO
SENO
SCLK
SENI
SENI
SDO
RTS
SDI
SDI
CS
Intel
®
Order Number: 248989, Revision: 003
LXT914 Flexible Quad Ethernet Repeater
I/O
I/O
I/O
I/O
I/O
O
O
O
I
I
I
I
I
Serial Enable Input. This active Low input is used to access the LXT914
serial interface. To write to the serial input (SDI), an External Management
Device (EMD) must drive this pin from High to Low. The input must be
asserted Low concurrent with the appearance of data on SDI and remain
Low for the duration of the serial input transaction.
Serial Enable Output. This active Low output is used to access the serial
interface of an EMD. When the LXT914 sends a data stream to the EMD
through the serial port (SDO), this output transitions from High to Low and
remains Low for the duration of the serial transmission.
Serial Data Input. This pin is the input for the EMD serial interface. Setup
and operating parameters are supplied to the LXT914 in a serial data
stream through this port when operating in the External Management
Mode.
Serial Data Output. After each packet transmission or interrupt event, the
LXT914 reports status information to the EMD in a serial data stream
through this port.
Serial Clock. This 10 MHz clock synchronizes the serial interface between
the LXT914 and the EMD. Both devices must be supplied from the same
clock source. In synchronous mode, SCLK and BCLK may be tied together.
Chip Select. The LXT914 is designed for use with an EEPROM or similar
device which may be used to store setup parameters and serially download
them to the LXT914 during initialization. In a single-device application or in
the first device of a daisy chain application, this pin is an active High Chip
Select output used to enable the EEPROM.
Serial Enable Input. In subsequent devices of a daisy-chain configuration,
a High-to-Low transition on this pin enables the serial input port (SDI). The
input must be asserted concurrent with the appearance of data on SDI and
remain Low for the duration of the serial input transaction.
Serial Enable Output. During initialization, the LXT914 accepts 48 bits of
setup data through the SDI port. After the 48th bit, the LXT914 asserts this
pin Low. When multiple LXT914 devices are connected in a daisy-chain,
this output is tied to the SENI input of the next device in the chain. Thus
each device in the chain is serially enabled by the previous device until all
the devices have read in their 48 bits of setup data.
Setup Data Input. This pin is the serial input port for the setup parameters
(48 bits).This pin should be tied Low if no EEPROM is present.
Request To Send. In a single-device application or in the first device of a
daisy chain application, this pin outputs a 9-bit, active High sequence. This
pin must be tied to the EEPROM DI input to trigger the EEPROM to
download its stored data. In subsequent devices this pin is not used.
Serial Clock. A 1 MHz clock provided by the first LXT914 in the chain to all
subsequent repeaters and the EEPROM. In the Local mode all repeaters
have their SCLKIO pins tied together.
Intel
®
Description
Description
LXT914 Flexible Quad Ethernet Repeater
31-Oct-2005
11

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