SLXT915QC.B3

Manufacturer Part NumberSLXT915QC.B3
DescriptionIC QUAD ETHERNET REPEATER 64-QFP
ManufacturerIntel
TypeRepeater
SLXT915QC.B3 datasheet
 


Specifications of SLXT915QC.B3

Rohs StatusRoHS non-compliantTx/rx TypeEthernet
Voltage - Supply4.75 V ~ 5.25 VCurrent - Supply240mA
Mounting TypeSurface MountPackage / Case64-QFP
Delay Time-Capacitance - Input-
Other names831529  
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2.5
10BASE-T Port Operation
2.5.1
10BASE-T Reception
Each LXT915 port receiver acquires data packets from its twisted-pair input (DIP/DIN). An
internal RC filter and an intelligent squelch function discriminate noise from link test pulses and
valid data streams. No external filters are required. The receive function is activated only by valid
data streams (above the squelch level and with proper timing). If the differential signal at the DI
circuit inputs falls below 75% of the threshold level (unsquelched) for eight bit times (typical), the
port receiver enters the idle state.
2.5.2
Polarity Detection and Correction
The LXT915 ports detect and correct for reversed polarity by monitoring link pulses and end-of-
frame sequences. A reversed polarity condition is declared when the port receives sixteen or more
incorrect link pulses consecutively, or four frames with reversed start-of-idle sequence. In these
cases the receiver reverses the polarity of the signal and thereby corrects for this failure condition.
If the port enters the link fail state and no valid data or link pulses are received within 96 to 128 ms,
the polarity is reset to the default non-flipped condition. (If Link Integrity Testing is disabled,
polarity detection is based only on received data.)
2.5.3
10BASE-T Link Integrity Testing
The LXT915 fully supports the 10BASE-T Link Integrity test function. The link integrity test
determines the status of the receive side twisted-pair cable. The receiver recognizes link integrity
pulses transmitted in the absence of data traffic. With no data packets or link integrity pulses within
100 (±50) ms, the port enters a link fail state and disables its transmitter. The port remains in the
link fail state until it detects three or more data packets or link integrity pulses.
2.5.4
10BASE-T Transmission
Each LXT915 10BASE-T port receives NRZ data from the repeater core and passes it through a
Manchester encoder. The encoded data is then transmitted to the twisted-pair network (the DO
circuit). The advanced integrated pulse shaping and filtering network produces the pre-distorted
and pre-filtered output signal to meet the 10 Base-T jitter template. An internal continuous resistor-
capacitor filter is used to remove any high-frequency clocking noise from the pulse shaping
circuitry. Integrated filters simplify the design work required for FCC compliant EMI performance.
During idle periods, the LXT915 ports transmit link integrity test pulses in accordance with the
802.3 10BASE-T standard.
Data packets transmitted by the LXT915 contain a minimum of 56 preamble bits before the start of
frame delimiter (SFD). In the Asynchronous mode, preamble regeneration takes place on the
transmit side. In the Synchronous mode, the preamble is regenerated on the receive side and
distributed via the IRB. If the total packet is less than 96 bits including the preamble, the
LXT915 extends the packet length to 96 bits by appending a Jam signal (1010...) at the end.
Datasheet
®
Intel
LXT915 Simple Quad Ethernet Repeater
15