PCA9546APW,112 NXP Semiconductors, PCA9546APW,112 Datasheet

IC I2C SWITCH 4CH 16TSSOP

PCA9546APW,112

Manufacturer Part Number
PCA9546APW,112
Description
IC I2C SWITCH 4CH 16TSSOP
Manufacturer
NXP Semiconductors
Datasheet

Specifications of PCA9546APW,112

Package / Case
16-TSSOP
Applications
4-Channel I²C Switcher
Interface
I²C, SMBus
Voltage - Supply
2.3 V ~ 5.5 V
Mounting Type
Surface Mount
Product
Multiplexer
Number Of Lines (input / Output)
4.0 / 1.0
Propagation Delay Time
0.3 ns
Supply Voltage (max)
3.6 V
Supply Voltage (min)
2.3 V
Maximum Operating Temperature
+ 85 C
Minimum Operating Temperature
- 40 C
Mounting Style
SMD/SMT
Number Of Input Lines
4.0
Number Of Output Lines
1.0
Power Dissipation
400 mW
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Lead Free Status / RoHS Status
Lead free / RoHS Compliant, Lead free / RoHS Compliant
Other names
568-5026
935275813112
PCA9546APW
PCA9546APW,112
PCA9546APW
1. General description
2. Features
The PCA9546A is a quad bidirectional translating switch controlled via the I
SCL/SDA upstream pair fans out to four downstream pairs, or channels. Any individual
SCx/SDx channel or combination of channels can be selected, determined by the
contents of the programmable control register.
An active LOW reset input allows the PCA9546A to recover from a situation where one of
the downstream I
I
Power-On Reset (POR) function.
The pass gates of the switches are constructed such that the V
the maximum high voltage which will be passed by the PCA9546A. This allows the use of
different bus voltages on each pair, so that 1.8 V or 2.5 V or 3.3 V parts can communicate
with 5 V parts without any additional protection. External pull-up resistors pull the bus up
to the desired voltage level for each channel. All I/O pins are 5 V tolerant.
I
I
I
I
I
I
I
I
I
I
I
I
I
I
I
I
I
2
C-bus state machine and causes all the channels to be deselected as does the internal
PCA9546A
4-channel I
Rev. 05 — 2 July 2009
1-of-4 bidirectional translating switches
I
Active LOW reset input
3 address pins allowing up to 8 devices on the I
Channel selection via I
Power-up with all switch channels deselected
Low R
Allows voltage level translation between 1.8 V, 2.5 V, 3.3 V and 5 V buses
No glitch on power-up
Supports hot insertion
Low standby current
Operating power supply voltage range of 2.3 V to 5.5 V
5 V tolerant Inputs
0 Hz to 400 kHz clock frequency
ESD protection exceeds 2000 V HBM per JESD22-A114, 200 V MM per
JESD22-A115, and 1000 V CDM per JESD22-C101
Latch-up testing is done to JEDEC Standard JESD78 which exceeds 100 mA
Three packages offered: SO16, TSSOP16, and HVQFN16
2
C-bus interface logic; compatible with SMBus standards
on
switches
2
C-buses is stuck in a LOW state. Pulling the RESET pin LOW resets the
2
C-bus switch with reset
2
C-bus, in any combination
2
C-bus
DD
pin can be used to limit
Product data sheet
2
C-bus. The

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PCA9546APW,112 Summary of contents

Page 1

PCA9546A 4-channel I Rev. 05 — 2 July 2009 1. General description The PCA9546A is a quad bidirectional translating switch controlled via the I SCL/SDA upstream pair fans out to four downstream pairs, or channels. Any individual SCx/SDx channel or ...

Page 2

... NXP Semiconductors 3. Ordering information Table 1. Type number PCA9546ABS PCA9546AD PCA9546APW 3.1 Ordering options Table 2. Type number PCA9546ABS PCA9546AD PCA9546APW PCA9546A_5 Product data sheet Ordering information Package Name Description HVQFN16 plastic thermal enhanced very thin quad flat package; no leads; 16 terminals; body 4 SO16 plastic small outline package ...

Page 3

... NXP Semiconductors 4. Block diagram SC0 SC1 SC2 SC3 SD0 SD1 SD2 SD3 RESET SCL SDA Fig 1. PCA9546A_5 Product data sheet PCA9546A SWITCH CONTROL LOGIC POWER-ON RESET INPUT FILTER Block diagram of PCA9546A Rev. 05 — 2 July 2009 PCA9546A 2 4-channel I C-bus switch with reset ...

Page 4

... NXP Semiconductors 5. Pinning information 5.1 Pinning RESET Fig 2. Fig 4. PCA9546A_5 Product data sheet SDA 3 14 SCL SD0 PCA9546AD 5 12 SC0 SC3 SD1 6 11 SD3 SC1 7 10 SC2 SD2 SS 002aab185 Pin configuration for SO16 terminal 1 index area RESET 1 SD0 2 PCA9546ABS SC0 ...

Page 5

... NXP Semiconductors 5.2 Pin description Table 3. Symbol A0 A1 RESET SD0 SC0 SD1 SC1 V SS SD2 SC2 SD3 SC3 A2 SCL SDA V DD [1] HVQFN16 package die supply ground is connected to both the V V pin must be connected to supply ground for proper device operation. For enhanced thermal, electrical, ...

Page 6

... NXP Semiconductors 6.2 Control register Following the successful acknowledgement of the slave address, the bus master will send a byte to the PCA9546A, which will be stored in the control register. If multiple bytes are received by the PCA9546A, it will save the last byte received. This register can be written and read via the I Fig 6 ...

Page 7

... NXP Semiconductors 6.3 RESET input The RESET input is an active LOW signal which may be used to recover from a bus fault condition. By asserting this signal LOW for a minimum of t its registers and I must be connected to V 6.4 Power-on reset When power is applied reset condition until V and the PCA9546A registers and I states (all zeroes) causing all the channels to be deselected ...

Page 8

... NXP Semiconductors More Information can be found in Application Note AN262: PCA954X family of I multiplexers and switches . 7. Characteristics of the I 2 The I C-bus is for 2-way, 2-line communication between different ICs or modules. The two lines are a serial data line (SDA) and a serial clock line (SCL). Both lines must be connected to a positive supply via a pull-up resistor when connected to the output stages of a device ...

Page 9

... NXP Semiconductors SDA SCL MASTER TRANSMITTER/ RECEIVER Fig 10. System configuration 7.4 Acknowledge The number of data bytes transferred between the START and the STOP conditions from transmitter to receiver is not limited. Each byte of eight bits is followed by one acknowledge bit. The acknowledge bit is a HIGH level put on the bus by the transmitter, whereas the master generates an extra acknowledge related clock pulse ...

Page 10

... NXP Semiconductors 7.5 Bus transactions Data is transmitted to the PCA9546A control register using the Write mode as shown in Figure 12. SDA START condition Fig 12. Write control register Data is read from PCA9546A using the Read mode as shown in SDA START condition Fig 13. Read control register PCA9546A_5 ...

Page 11

... NXP Semiconductors 8. Application design-in information Fig 14. Typical application PCA9546A_5 Product data sheet SDA SDA SCL SCL RESET 2 I C/SMBus master Rev. 05 — 2 July 2009 PCA9546A 2 4-channel I C-bus switch with reset 5.5 V SD0 SC0 5.5 V SD1 SC1 5.5 V ...

Page 12

... NXP Semiconductors 9. Limiting values Table 5. In accordance with the Absolute Maximum Rating System (IEC 60134). Voltages are referenced to V Symbol tot T stg T amb [1] The performance capability of a high-performance integrated circuit in conjunction with its thermal environment can create junction temperatures which are detrimental to reliability. The maximum junction temperature of this integrated circuit should not exceed 125 C ...

Page 13

... NXP Semiconductors 10. Static characteristics Table 6. Static characteristics +85 C; unless otherwise specified. See SS amb Symbol Parameter Supply V supply voltage DD I supply current DD I standby current stb V power-on reset voltage POR Input SCL; input/output SDA V LOW-level input voltage IL V HIGH-level input voltage ...

Page 14

... NXP Semiconductors Table 7. Static characteristics +85 C; unless otherwise specified. See SS amb Symbol Parameter Supply V supply voltage DD I supply current DD I standby current stb V power-on reset voltage POR Input SCL; input/output SDA V LOW-level input voltage IL V HIGH-level input voltage IH I LOW-level output current ...

Page 15

... NXP Semiconductors 11. Dynamic characteristics Table 8. Dynamic characteristics Symbol Parameter t propagation delay PD f SCL clock frequency SCL t bus free time between a STOP and BUF START condition t hold time (repeated) START condition HD;STA t LOW period of the SCL clock LOW t HIGH period of the SCL clock ...

Page 16

... NXP Semiconductors SDA t BUF t LOW SCL t HD;STA P S Fig 15. Definition of timing on the I SCL SDA RESET 50 % Fig 16. Definition of RESET timing START protocol condition (S) t SU;STA SCL t BUF SDA t HD;STA Rise and fall times refer Fig 17. I C-bus timing diagram PCA9546A_5 ...

Page 17

... NXP Semiconductors 12. Package outline SO16: plastic small outline package; 16 leads; body width 3 pin 1 index 1 DIMENSIONS (inch dimensions are derived from the original mm dimensions) A UNIT max. 0.25 1.45 mm 1.75 0.25 0.10 1.25 0.010 0.057 inches 0.069 0.01 0.004 0.049 Note 1. Plastic or metal protrusions of 0.15 mm (0.006 inch) maximum per side are not included. ...

Page 18

... NXP Semiconductors TSSOP16: plastic thin shrink small outline package; 16 leads; body width 4 pin 1 index 1 DIMENSIONS (mm are the original dimensions) A UNIT max. 0.15 0.95 mm 1.1 0.25 0.05 0.80 Notes 1. Plastic or metal protrusions of 0.15 mm maximum per side are not included. 2. Plastic interlead protrusions of 0.25 mm maximum per side are not included. ...

Page 19

... NXP Semiconductors HVQFN16: plastic thermal enhanced very thin quad flat package; no leads; 16 terminals; body 0.85 mm terminal 1 index area terminal 1 index area DIMENSIONS (mm are the original dimensions) (1) A UNIT max. 0.05 0. 0.2 0.00 0.23 Note 1. Plastic or metal protrusions of 0.075 mm maximum per side are not included. ...

Page 20

... NXP Semiconductors 13. Soldering of SMD packages This text provides a very brief insight into a complex technology. A more in-depth account of soldering ICs can be found in Application Note AN10365 “Surface mount reflow soldering description” . 13.1 Introduction to soldering Soldering is one of the most common methods through which packages are attached to Printed Circuit Boards (PCBs), to form electrical circuits ...

Page 21

... NXP Semiconductors 13.4 Reflow soldering Key characteristics in reflow soldering are: • Lead-free versus SnPb soldering; note that a lead-free reflow process usually leads to higher minimum peak temperatures (see reducing the process window • Solder paste printing issues including smearing, release, and adjusting the process window for a mix of large and small components on one board • ...

Page 22

... NXP Semiconductors Fig 21. Temperature profiles for large and small components For further information on temperature profiles, refer to Application Note AN10365 “Surface mount reflow soldering description” . 14. Abbreviations Table 11. Acronym CDM ESD HBM C-bus LSB MM MSB PCB SMBus PCA9546A_5 Product data sheet ...

Page 23

... Release date PCA9546A_5 20090702 • Modifications: The format of this data sheet has been redesigned to comply with the new identity guidelines of NXP Semiconductors. • Legal texts have been adapted to the new company name where appropriate. • Table 7 “Static characteristics at V SDA”: – ...

Page 24

... Right to make changes — NXP Semiconductors reserves the right to make changes to information published in this document, including without limitation specifications and product descriptions, at any time and without notice ...

Page 25

... NXP Semiconductors 18. Contents 1 General description . . . . . . . . . . . . . . . . . . . . . . 1 2 Features . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1 3 Ordering information . . . . . . . . . . . . . . . . . . . . . 2 3.1 Ordering options . . . . . . . . . . . . . . . . . . . . . . . . 2 4 Block diagram . . . . . . . . . . . . . . . . . . . . . . . . . . 3 5 Pinning information . . . . . . . . . . . . . . . . . . . . . . 4 5.1 Pinning . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4 5.2 Pin description . . . . . . . . . . . . . . . . . . . . . . . . . 5 6 Functional description . . . . . . . . . . . . . . . . . . . 5 6.1 Device address . . . . . . . . . . . . . . . . . . . . . . . . . 5 6.2 Control register . . . . . . . . . . . . . . . . . . . . . . . . . 6 6.2.1 Control register definition . . . . . . . . . . . . . . . . . 6 6.3 RESET input . . . . . . . . . . . . . . . . . . . . . . . . . . . 7 6.4 Power-on reset ...

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