QLX4600LIQT7 Intersil, QLX4600LIQT7 Datasheet

IC EQUALIZER REC 6.25GBPS 46QFN

QLX4600LIQT7

Manufacturer Part Number
QLX4600LIQT7
Description
IC EQUALIZER REC 6.25GBPS 46QFN
Manufacturer
Intersil
Series
QLx™r
Datasheets

Specifications of QLX4600LIQT7

Applications
Data Transport
Voltage - Supply
1.1 V ~ 1.3 V
Package / Case
46-WQFN
Mounting Type
Surface Mount
Rohs Compliant
Yes
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Interface
-
Other names
QLX4600LIQT7-TR

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Manufacturer
Quantity
Price
Part Number:
QLX4600LIQT7
Manufacturer:
Intersil
Quantity:
2 075
QLx4600-SL30 v3.0
QLx4600-SL30 Quad Lane Extender
FEATURES
APPLICATIONS
BENEFITS
TYPICAL APPLICATION CIRCUIT
Supports data rates up to 6.25Gb/s
Low power (78mW per channel)
Low latency (<500ps)
QSFP active copper cable modules
InfiniBand (SDR & DDR)
10GBase-CX4
Thinner gauge cable
Extends cable reach greater than 3x
Improved BER
Four equalizers in a 4mm x 7mm QFN package for
straight route-through architecture & simplified routing
Each equalizer boost is independently pin selectable
and programmable
Beacon signal support and line silence preservation
1.2V supply voltage
Individual lane LOS support
XAUI and RXAUI
SAS (2.0)
High-speed active cable assemblies
High-speed printed circuit board (PCB) traces
FIGURE 1: TYPICAL APPLICATION DIAGRAM
GENERAL DESCRIPTION
The QLx4600-SL30 is a settable quad receive-side equalizer with extended
functionality for advanced protocols operating with line rates up to 6.25Gb/s
such as InfiniBand (SDR & DDR) and 10GBase-CX4. The QLx4600-SL30
compensates for the frequency dependent attenuation of copper twin-axial
cables, extending the signal reach up to 30m on 24AWG cable.
The small form factor, highly-integrated quad design is ideal for high-density
data transmission applications including active copper cable assemblies.
The four equalizing filters within the QLx4600-SL30 can each be set to one
of 32 compensation levels, providing optimal signal fidelity for a given media
and length. The compensation level for each filter can be set by either (a)
three external control pins or (b) a serial bus interface. When the external
control pins are used, 18 of the 32 boost levels are available for each
channel. If the serial bus is used, all 32 compensation levels are available.
Operating on a single 1.2V power supply, the QLx4600-SL30 enables per
channel throughputs of up to 6.25Gb/s while supporting lower data rates
including 5, 4.25, 3.125, and 2.5Gb/s. The QLx4600-SL30 uses current
mode logic (CML) inputs/outputs and is packaged in a 4mm x 7mm 46-lead
QFN. Individual lane LOS support is included for module applications.
1
©2009 Quellan, Inc

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QLX4600LIQT7 Summary of contents

Page 1

QLx4600-SL30 Quad Lane Extender FEATURES Supports data rates up to 6.25Gb/s Low power (78mW per channel) Low latency (<500ps) Four equalizers in a 4mm x 7mm QFN package for straight route-through architecture & simplified routing Each equalizer boost is independently ...

Page 2

... CP[k][A,B,C] Current draw on digital pin, i.e., CP[k][A,B,C], DI, Clk, ENB TABLE 3: CONTROL PIN CHARACTERISTICS 2 PACKAGING / ORDERING INFORMATION Part Number Packaging 7” prod. tape & QLX4600LIQT7 reel; qty 1,000 7” sample reel; QLX4600LIQSR qty 100 10 pcs sample QLX4600LIQSB bag Min Typ ...

Page 3

ELECTRICAL CHARACTERISTICS Typical values are 1.2V 25˚C, and Parameter Symbol Supply Current I Cable Input V Amplitude Range DC Differential Input Resistance DC Single-Ended Input Resistance Input Return Loss S DD (Differential) ...

Page 4

Parameter Symbol LOS De-Assert Time Minimum Valid Transmitter Amplitude Maximum Allowable Transmitter Output During Line Silence Data-to-Line Silence t Response Time Line Silence-to-Data t Response Time |t Timing Difference DS Note 1: After channel loss, differential amplitudes at QLx4600-SL30 inputs ...

Page 5

TYPICAL PERFORMANCE CHARACTERISTICS V = 1.2V 25ºC, unless otherwise noted. Performance was characterized using the system testbed shown in Figure 2. Unless DD A otherwise noted, the transmitter generated a non-return-to-zero (NRZ) PRBS-7 sequence at 800mVpp (differential) with ...

Page 6

TYPICAL PERFORMANCE CHARACTERISTICS Received Signal After 20m of 24AWG Twin-Axial Cable (Cable A), 5Gb/s 40ps/div Received Signal After 12m of 30AWG Twin-Axial Cable (Cable B), 5Gb/s 40ps/div Received Signal After 20m of 28AWG Twin-Axial 1 Cable (Cable C) , 5Gb/s ...

Page 7

TYPICAL PERFORMANCE CHARACTERISTICS Received Signal After 30m of 24AWG Twin-Axial 1 Cable , 5Gb/s 40ps/div Received Signal After 15m of 28AWG Twin-Axial 1 Cable (Cable D) , 6.25Gb/s 32ps/div Received Signal After 40” FR4, 6.25Gb/s 32ps/div Note 1: Differential transmit ...

Page 8

TYPICAL PERFORMANCE CHARACTERISTICS Input Common-Mode Return Loss 0 Channel 1 -5 Channel 2 Channel 3 Channel 4 -10 -15 -20 -25 -30 0 0.5 1 1.5 2 Frequency (GHz) Input Differential Return Loss 0 -5 -10 -15 -20 -25 -30 ...

Page 9

TYPICAL PERFORMANCE PIN DIAGRAM IN1[P] IN1[N] IN2[P] IN2[N] IN3[P] IN3[N] IN4[P] IN4[N] LOS1 LOS2 GND PIN DESCRIPTIONS Pin Name Pin Number Detection Threshold. Reference DC current threshold for input signal power detection. Data output Out[ muted when ...

Page 10

Pin Name Pin Number Equalizer 4 differential input, CML. The use of 100nF low ESL/ESR MLCC capacitor with at least 4GHz In4[P,N] 11, 12 frequency response is recommended. LOS1 13 LOS indicator 1. High output when equalized In1 signal is ...

Page 11

OPERATION The QLx4600-SL30 is an advanced quad lane-extender for high-speed interconnects. A functional diagram of one of the four channels in the QLx4600-SL30 is shown in Figure 7. In addition to a robust equalization filter to compensate for channel loss ...

Page 12

CML INPUT AND OUTPUT BUFFERS The input and output buffers for the high-speed data channels in the QLx4600-SL30 are implemented using CML. Equivalent input and output circuits are shown in Figures 9 and 10. FIGURE 9: CML INPUT EQUIVALENT CIRCUIT ...

Page 13

APPLICATIONS INFORMATION Several aspects of the QLx4600-SL30 are capable of being dynamically managed by a system controller to provide maximum flexibility and optimum performance. These functions are controlled by interfacing to the highlighted pins in Figure 11. The specific procedures ...

Page 14

The boost setting for equalizer channel k can be read as a three digit ternary number across CP[k][A,B,C]. The ternary value is established by the value of the resistor between VDD and the CP[k][A,B,C] pin second option, the ...

Page 15

OPTIMAL CABLE BOOST SETTINGS The settable equalizing filter within the QLx4600 enables the device to optimally compensate for frequency-dependent attenuation across a wide variety of channels, data rates, and encoding schemes. For the reference channels plotted in Figure 3, Table ...

Page 16

REGISTER DESCRIPTION The QLx4600-SL30’s internal registers are listed in Table 10. Register 1 determines whether the CP pins or register values 2 through 21 are used to set the boost level. When this register is set, the QLx4600-SL30 uses registers ...

Page 17

SERIAL BUS PROGRAMMING Pins 16 (DI), 45 (ENB), and 46 (CLK) are used to program the registers inside the QLx4600-SL30. Figure 12 shows an exemplary timing diagram for the signals on these pins. The serial bus can be used to ...

Page 18

SEPARATE ENB SIGNALS Multiple QLx4600-SL30 devices can be programmed from a common serial data stream as shown in Figure 13. Here, each QLx4600-SL30 is provided its own ENB signal, and only one of these ENB signals is pulled ‘LOW’, and ...

Page 19

A diagram for programming multiple QLx4600-SL30s is shown in Figure 15 noted that the board layout should ensure that the additional clock delay experienced between subsequent QLx4600-SL30s should be no more than the minimum value of t FIGURE ...

Page 20

DETECTION THERESHOLD (DT) PIN FUNCTIONALITY The QLx4600-SL30 is capable of maintaining periods of line silence on any of its four channels by monitoring each channel for loss of signal (LOS) conditions and subsequently muting the outputs of a respective channel ...

Page 21

TYPICAL APPLICATION REFERENCE DESIGNS Figures 18 and 19 (this page and next) show reference design schematics for a QLx4600-SL30 evaluation board with an SMA connector interface. Figure 18 shows the schematic for the case when the equalizer boost level is ...

Page 22

TYPICAL APPLICATION REFERENCE DESIGNS 1.2V Loss of signal indicator (Channels 1 and 2) 1.2V Bypass circuit for each V pin 10, 29, 32 (*100pF capacitor should be positioned closest to the pin) FIGURE 19: APPLICATION CIRCUIT ...

Page 23

BOARD FOOTPRINT – QLx4600-SL30 Note 1: All dimensions are in mm Note 2: Recommended pad finish: Immersion gold 0.5μm or less Note 3: Ground/thermal vias finished PTH diameter: 0.33mm maximum (4 places) Note 4: Solder stencil for Ground Pad recommended ...

Page 24

PACKAGE OUTLINE QFN – 4mm x 7mm QLx4600-SL30 v3.0 FIGURE 21: QFN PACKAGING OUTLINE 24 QLx4600-SL30 ©2009 Quellan, Inc ...

Page 25

PART MARKING INFORMATION QLX4600CL 123456 ZWWYY PIN 1 INDICATOR Notes: 123456 = wafer lot number ZWWYY supplier code (A=ASECL, M= Millennium Micro Technology work week of assembly YY = year of assembly TAPE AND REEL INFORMATION ...

Page 26

QLx4600-SL30 v3.0 FIGURE 22: TAPE AND REEL INFORMATION 26 QLx4600-SL30 ©2009 Quellan, Inc ...

Page 27

ABOUT Q:ACTIVE Quellan has long realized that to enable the complex server clusters of next generation datacenters critical to manage the signal integrity issues of electrical interconnects. To address this, Quellan has developed its groundbreaking Q:ACTIVE® product ...

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