LMH0384SQE/NOPB National Semiconductor, LMH0384SQE/NOPB Datasheet - Page 7

IC ADAPT CBL EQUALIZER 16-LLP

LMH0384SQE/NOPB

Manufacturer Part Number
LMH0384SQE/NOPB
Description
IC ADAPT CBL EQUALIZER 16-LLP
Manufacturer
National Semiconductor
Datasheet

Specifications of LMH0384SQE/NOPB

Applications
Digital Interface
Interface
SPI
Voltage - Supply
3.135 V ~ 3.465 V
Package / Case
16-LLP
Mounting Type
Surface Mount
Leaded Process Compatible
Yes
Rohs Compliant
Yes
Input Voltage
3.3 V
Supply Voltage (max)
3.45 V
Supply Voltage (min)
3.15 V
Maximum Operating Temperature
+ 85 C
Minimum Operating Temperature
- 40 C
Mounting Style
SMD/SMT
Peak Reflow Compatible (260 C)
Yes
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Other names
LMH0384SQETR

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
LMH0384SQE/NOPB
Manufacturer:
STM
Quantity:
4 302
Block Diagram (Pin Mode)
Device Operation
BLOCK DESCRIPTION
The Equalizer Filter block is a multi-stage adaptive filter. If
Bypass is high, the equalizer filter is disabled.
The DC Restoration / Level Control block receives the dif-
ferential signals from the equalizer filter block. This block
incorporates a self-biasing DC restoration circuit to fully DC
restore the signals. If Bypass is high, this function is disabled.
The signals before and after the DC Restoration / Level Con-
trol block are used to generate the Automatic Equalization
Control (AEC) signal. This control signal sets the gain and
bandwidth of the equalizer filter. The loop response in the
AEC block is controlled by an external 1µF capacitor placed
across the AEC+ and AEC- pins.
The Carrier Detect block generates the carrier detect signal
based on the SDI input and an adjustment from the Mute
Reference block.
The SPI Control block uses the MOSI, MISO, SCK, and SS
signals in SPI mode to control the SPI registers. SPI_EN se-
lects between SPI mode and pin mode. In pin mode, SPI_EN
is driven logic low.
The Output Driver produces SDO and SDO.
MUTE REFERENCE (MUTE
The mute reference sets the threshold for CD and (with CD
tied to MUTE) determines the amount of cable to equalize
before automatically muting the outputs. This is set by apply-
ing a voltage inversely proportional to the length of cable to
equalize. The applied voltage must be greater than the
MUTE
REF
floating voltage (typically 1.3V) in order to change
REF
)
7
the CD threshold. As the applied MUTE
creased, the amount of cable that can be equalized before
carrier detect is de-asserted and the outputs are muted is de-
creased. MUTE
ground for normal CD operation.
CARRIER DETECT (CD) AND MUTE
Carrier detect CD indicates if a valid signal is present at the
LMH0384 input. If MUTE
old will be altered accordingly. CD provides a high voltage
when no signal is present at the LMH0384 input. CD is low
when a valid input signal is detected.
MUTE can be used to manually mute or enable SDO and
SDO. Applying a high input to MUTE will mute the LMH0384
outputs by forcing the output to a logic zero. Applying a low
input will force the outputs to be active.
CD and MUTE may be tied together to automatically mute the
output when no input signal is present.
AUTO SLEEP
The auto sleep mode allows the LMH0384 to power down
when no input signal is detected. If the AUTO SLEEP pin is
set high, the LMH0384 goes into a deep power save mode
when no signal is detected. The device powers on again once
an input signal is detected. The auto sleep functionality can
be turned off by setting AUTO SLEEP low or tying this pin to
ground. An additional auto sleep setting available in SPI mode
can be used to force the equalizer to power down regardless
of whether there is an input signal or not. Auto sleep has
precedence over mute and bypass modes.
In auto sleep mode, the time to power down the equalizer
when the input signal is removed is less than 200 µs and
REF
may be left unconnected or connected to
REF
is used, the carrier detect thresh-
REF
voltage is in-
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