CYV15G0100EQ-SXC Cypress Semiconductor Corp, CYV15G0100EQ-SXC Datasheet
CYV15G0100EQ-SXC
Specifications of CYV15G0100EQ-SXC
Related parts for CYV15G0100EQ-SXC
CYV15G0100EQ-SXC Summary of contents
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... Pin compatible to existing equalizer devices Functional Description The CYV15G0100EQ is a multi rate adaptive equalizer designed to equalize and restore signals received over 75Ω coaxial cable. The equalizer meets SMPTE 292M, SMPTE 344M, and SMPTE 259M data rates. The CYV15G0100EQ is optimized to equalize up to 175m of Belden 1694A coaxial cable at 270 Mbps and up to 70m of Belden 1694A coaxial cable at 1 ...
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... Equalizer Block Diagram CYV15G0100EQ Prosumer Video Cable Equalizer Block Diagram CYV15G0100EQ Prosumer Video Cable Equalizer Block Diagram Cable Length Analog Adjustor and Mute MCLADJ Threshold Block DC Restore SDI, SDI Equalizer Pinouts Figure 1. Pin Diagram - 16 Pin SOIC (Top View) CLI VCC GND ...
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... Table 1. Pin Descriptions - CYV15G0100EQ Single Channel Cable Equalizer Name IO Characteristics Signal Description Control Signals CLI Analog Output CD/MUTE LVTTL IO MCLADJ Analog Input BYPASS LVTTL Input AGC± Analog SDO, SDO Differential Output SDI, SDI Differential Input Power VCC Power GND Gnd Document Number: 001-12520 Rev ...
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... HD data rates is received, the equalizer’s serial outputs are muted. BYPASS The CYV15G0100EQ has a bypass mode that enables the user to bypass the equalizer’s equalization and DC restoration functions. When the bypass mode is set HIGH, the signal presented at the equalizer’s differential serial inputs (SDI, SDI) is routed to the equalizer’ ...
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... Production test. 2. Calculated results from production test. 3. Not tested. Based on characterization. Document Number: 001-12520 Rev. ** Power Up Requirements The CYV15G0100EQ contains one power supply. The voltage on any input or IO pin must not exceed the power pin during power up. Operating Range Range Commercial + 0 ...
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... Belden 1694A: 0-70m Canare L-5CFB: 0-70m 800 mV transmit amplitude Equalizer pathological pattern 20% - 80%, HD data rate 20% - 80%, SD data rate [3, 4] – HD color bar pattern – – Single-ended Single-ended Single-ended CYV15G0100EQ Min Typ Max Unit 143 – 1485 Mbps [5] 500 1200 mV [6] 500 ...
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... Figure 3. CLI Output Voltage Vs Belden 1694A Cable Length at SD-SDI and HD-SDI Data Rates 2.7 2.65 2.6 2.55 2.5 2.45 2.4 2.35 2.3 0 Document Number: 001-12520 Rev 25° 100 CABLE LENGTH ( 100 CABLE LENGTH (m) CYV15G0100EQ 125 150 175 125 150 175 Page [+] Feedback ...
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... Typical Application Circuit Figure 4. Interfacing CYV15G0100EQ to the HOTLink II SerDes LFI RXLE SDASEL RXD7 RXD6 LPEN RXD5 INSEL Z 0 RXD4 IN1+ RXD3 2 Z RXD2 0 RXD1 IN1− R18 RXD0 Z 0 FRAMCHAR RXOP RXST2 RFEN RXST1 RFMODE DECMODE RXST0 RXCLK+ RXCKSEL RXCLK− ...
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... Ordering Information Ordering Code CYV15G0100EQ-SXC Package Dimension Document Number: 001-12520 Rev. ** Package Name Package Type SZ16.15 Pb-free 16-Pin 150 Mil SOIC Figure 5. 16-Pin (150 Mil) SOIC S16.15 CYV15G0100EQ Operating Range 0 to 70°C 51-85068-*B Page [+] Feedback ...
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... Document History Page Document Title: CYV15G0100EQ Prosumer Video Cable Equalizer Document Number: 001-12520 ISSUE REV. ECN NO. DATE ** 1396423 SEE ECN © Cypress Semiconductor Corporation, 2007. The information contained herein is subject to change without notice. Cypress Semiconductor Corporation assumes no responsibility for the use of any circuitry other than circuitry embodied in a Cypress product ...