ISP1582BSGA ST-Ericsson Inc, ISP1582BSGA Datasheet
ISP1582BSGA
Specifications of ISP1582BSGA
ISP1582BS-S
Related parts for ISP1582BSGA
ISP1582BSGA Summary of contents
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IMPORTANT NOTICE Dear customer from August 2 2008, the wireless operations of NXP have moved to a new company, ST-NXP Wireless result, the following changes are applicable to the attached document. ● Company name - NXP ...
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AN10039 ISP1582/83 Firmware Programming Guide Rev. 04 — 21 December 2006 Document information Info Content Keywords isp1582; isp1583; peripheral controller; usb; universal serial bus Abstract This document explains the firmware programming of the ISP1582/83. Application note ...
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NXP Semiconductors Revision history Rev Date Description 04 20061221 Fourth release. • • • • Added • • Updated • Added • Added 03 20060907 Third release: • Updated • • • Updated 02 20050103 Second release: updated 01 20040603 ...
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NXP Semiconductors 1. Introduction The ISP1582/ Hi-Speed Universal Serial Bus (USB) Peripheral Controller that provides a flexible interface for a wide range of microcontrollers. The high-speed microcontroller interface increases system throughput and reduces processor utilization. The ISP1582/83 can ...
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NXP Semiconductors 2. ISP1582/83 initialization routine 2.1 Initializing the ISP1582/83 registers The initialization routine depends on the application targeted, such as mass storage and GDMA, for the ISP1582/83. The routine has most of the initializations common to all applications, except ...
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NXP Semiconductors 2.2 Initializing the Mode register After the power-on reset, the processor initializes the Mode register (see register can be programmed, depending on the application. Table 1. ISP1583 Mode register: bit allocation Bit 15 14 Symbol TEST2 TEST1 Reset ...
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NXP Semiconductors Table 2. Interrupt Configuration register: bit allocation Bit 7 6 Symbol CDBGMOD[1:0] Reset 1 1 Bus reset 1 1 Access R/W R/W The interrupt generation depends on the type of mode setting specified in the register; see Table ...
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NXP Semiconductors } Fig 4. CATC capture of IN ACK interrupt The OUT endpoint is programmed to all ACK and NYET interrupts as shown in Fig 5. CATC capture of OUT ACK and NYET interrupt 2.4 Initializing the Interrupt Enable ...
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NXP Semiconductors Table 4. Interrupt Enable register: bit allocation Bit 31 30 Symbol Reset - - Bus reset - - Access - - Bit 23 22 Symbol IEP6TX IEP6RX Reset 0 0 Bus reset 0 0 Access R/W R/W Bit ...
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NXP Semiconductors 2.5 Initializing the DMA Configuration and Hardware registers Next, you configure the DMA Configuration register (see register (see application, some associated registers must be programmed. Table 5. ISP1583 DMA Configuration register: bit allocation Bit 15 14 Symbol reserved ...
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NXP Semiconductors ATA mode Master DMA mode PIO mode Not used Not used Not used Not used Not used Not used Not used AN10039_4 Application note DIS_XFER Mode _CNT Not used 0 1 Not used 0 2 ...
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NXP Semiconductors ATA mode Master DMA mode PIO mode Not used Not used Not used Not used Not used Not used 0 1 Invalid AN10039_4 Application note DIS_XFER Mode _CNT 1 Not used Not ...
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NXP Semiconductors When DIS_XFER_CNT is set to logic 1, the DMA transfer counter is not in use, and the DMA termination is done using the input signal of pin EOT. This mode is called EOT mode. The polarity of pin ...
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NXP Semiconductors Table 9. Endpoint Type register: bit allocation Bit 15 14 Symbol Reset - - Bus reset - - Access - - Bit 7 6 Symbol reserved Reset - - Bus reset - - Access - - Table 10. ...
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NXP Semiconductors Fig 6. Initializing endpoint The initialization routine is used when: • The system is powered up. • A bus-reset event occurs. • There is a change from full-speed to high-speed. The following is a sample code for the ...
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NXP Semiconductors AN10039_4 Application note if(Kernel_Flag.BITS.HS_FS_State == FULL_SPEED) { //Bulk Out MaxPacketSize Endpoint D14_Cntrl_Reg.D14_ENDPT_INDEX = 4; D14_Cntrl_Reg.D14_ENDPT_MAXPKTSIZE.VALUE = 0x4000; //Bulk In MaxPacketSize Endpoint D14_Cntrl_Reg.D14_ENDPT_INDEX = 5; D14_Cntrl_Reg.D14_ENDPT_MAXPKTSIZE.VALUE = 0x4000; //Bulk Out Endpoint Type D14_Cntrl_Reg.D14_ENDPT_INDEX = 4; D14_Cntrl_Reg.D14_ENDPT_TYPE.VALUE = 0x1600; //Bulk ...
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NXP Semiconductors } The initialization of the endpoint is done as shown in RAM to be configured. Ensure that the total FIFO size of endpoints does not exceed 8 kB. 3. ISP1582/83 USB enumeration process The USB enumeration process can ...
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NXP Semiconductors FIFO, the buffer length is a means for the firmware to auto-validate the FIFO once the value is reached used when data to be sent in the IN endpoint is a short packet. Table 12. Control ...
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NXP Semiconductors 3.1 Set-up token with data IN stage It is not required to read the buffer length of the set-up token buffer because all USB request is 8 bytes in length and the set-up FIFO is also 8 bytes ...
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NXP Semiconductors 3.2 Set-up token with data OUT stage Proceed to other set-up token process No Fig 8. Set-up token with data OUT stage AN10039_4 Application note ISP1582/83 Firmware Programming Guide Start No Set-up token interrupt occurs Yes It is ...
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NXP Semiconductors 3.3 Set-up token with no data stage Proceed to other set-up token process Fig 9. Set-up token with no data stage AN10039_4 Application note ISP1582/83 Firmware Programming Guide Start No Set-up token interrupt occurs Yes It is not ...
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NXP Semiconductors 3.4 Stalling set-up token Proceed to set-up token process Fig 10. Stalling set-up token AN10039_4 Application note ISP1582/83 Firmware Programming Guide Start No Set-up token interrupt occurs Yes Initialize the endpoint index to the set-up endpoint by using ...
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NXP Semiconductors 3.5 Data IN transfer MaxPacketSize? MaxPacketSize of Data to Data Port No interrupt occurs Filled data is sent Next block of data Yes > MaxPacketSize? Fig 11. Data IN transfer AN10039_4 Application note Start Index to IN endpoint ...
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NXP Semiconductors 3.6 Data OUT transfer Fig 12. Data OUT transfer AN10039_4 Application note ISP1582/83 Firmware Programming Guide Start OUT token No interrupt occurs? Yes Index to OUT endpoint Check the endpoint data length using the Buffer Length register Read ...
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NXP Semiconductors 4. DMA 4.1 DMA reset The DMA reset command is used to reset the DMA core to the power-on reset state. Issue the DMA reset command using the DMA command register. 4.2 DMA start To issue a DMA ...
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NXP Semiconductors 5. Mass storage application After successful enumeration, the respective device drivers come into play. For a mass storage application, the firmware must conform to USB Mass Storage Class Bulk-Only Transport Specification and the ATA/ATAPI protocol. The host sends ...
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NXP Semiconductors 5.1 Mass storage protocol Bulk-only mass storage protocol Start Check if the OUT token is 31 bytes No CBW received? Data IN or OUT process Determine the status of the drive Status error? Yes Report CSW with error ...
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NXP Semiconductors 5.1.2 Handling CBW for ATA and ATAPI device 1. Initialize the Drive Select register (1F6) to the master or slave, based on the device present. 2. Initialize the Error or Feature register to 1 for a DMA transfer. ...
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NXP Semiconductors No ATAPI Write Phase Fig 14. Handling CBW for ATAPI device AN10039_4 Application note ISP1582/83 Firmware Programming Guide Start Initialize the Drive or Select register to master or slave Initialize the Error or Feature register to one for ...
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NXP Semiconductors Start Initialize the Endpoint Index register to the OUT endpoint Initialize the DMA Transfer Counter register to CBW.dCBWDataTranferLength Write to the DMA Command register with the DMA or PIO write command CMD_INTRQ_OK == 0 AND INTRQ_PENDING == 0 ...
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NXP Semiconductors Start Initialize the Endpoint Index register to the IN endpoint Initialize the DMA Transfer Counter register to CBW.dCBWDataTransferLength Write to the DMA Command register with the DMA or PIO Read command CMD_INTRQ_OK == 0 AND INTRQ_PENDING == 0 ...
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NXP Semiconductors Yes CMD_INTRQ_OK == 0 INTRQ_PENDING == 0 INTRQ_PENDING == 1 CMD_INTRQ_OK == 0 Yes Clear INTRQ_PENDING Read the Command or Status Task File register Read alternate Status or Device Control Task File register Alternate Status or Device Control ...
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NXP Semiconductors 5.1.3 Handling invalid CBW A command block is invalid if it has an invalid CBW signature. 1. Initialize the Endpoint Index register to the respective OUT endpoint. 2. Set the STALL bit in the Control Function register. When ...
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NXP Semiconductors Yes Handle ATA inquiry A Is CBWCDB [0] == Yes READ_CAPACITY CMD Handle ATA READ_CAPACITY Is CBWCDB [ READ_FORMAT_CAPACITIES CMD Is CBWCDB [0] == Yes REQUEST_SENSE CMD Handle ATA REQUEST_SENSE Is CBWCDB [ MODE_SENSE_10 ...
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NXP Semiconductors Start Initialize the drive select Task File register to master or slave based on the device present Initialize the Endpoint Index register to the respective IN endpoint Is CBW.dCBWDataTransferLength == 6 No Initialize the DMA transfer counter = ...
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NXP Semiconductors No Initialize the Endpoint Index register to the respective IN endpoint No DMA command register = MDMA_Read_command Yes Read the DMA Transfer Counter register to check partial transfer Byte_Transfered_Count = DMA No CMD_INTRQ_OK = 0 Yes INTRQ_PENDING == ...
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NXP Semiconductors Start Sector_Count = CBW.CDB[7] Endpt_FIFO = CBW.dCBWDataTransferLength Sector_Count != 0 Yes Atapi_ByteCount = 512 CBW.dCBWDataTransferLength = CBW.dCBWDataTransferLength - 512 Interrupt Reason Task File register = 0 Sector Number Task File register = CBW.CDB[5] Byte count LSB Task File ...
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NXP Semiconductors Fig 22. Handling ATA READ CAPACITY AN10039_4 Application note ISP1582/83 Firmware Programming Guide Start Initialize the Endpoint Index register to the respective IN endpoint Buffer length LSB Task File register = 8 Buffer length MSB Task File register ...
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NXP Semiconductors Fig 23. Handling ATA READ_FORMAT_CAPACITIES Start Initialize the Endpoint Index register to the respective IN endpoint Write these values to the Data Port register: 0x70, 0x00, Error_Code.SENSE_KEY, 0x00, 0x00, 0x00, 0x00, 0x0A, 0x00, 0x00, 0x00, 0x00,Error_Code.ASC, Error_Code.ASCQ, 0x00, ...
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NXP Semiconductors Fig 25. Handling ATA MODE_SENSE_10 Fig 26. Handling ATA MODE_SENSE_06 AN10039_4 Application note ISP1582/83 Firmware Programming Guide Start Initialize the Endpoint Index register to the respective IN endpoint Write the following values to the Data Port register: 0x2A, ...
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NXP Semiconductors Start Sector_Count = CBW.CDB[7] Endpt_FIFO = CBW.dCBWDataTransferLength Sector_Count != 0 Yes Atapi_ByteCount = 512 CBW.dCBWDataTransferLength = CBW.dCBWDataTransferLength - 512 Interrupt Reason Task File register = 0 Sector Number Task File register = CBW.CDB[5] Byte count LSB Task File ...
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NXP Semiconductors 6. GDMA application The GDMA application supports GDMA slave and PIO modes. These modes are selected based on the vendor-specific command issued by the host. The host sends an 8-byte set-up packet, followed by 6-byte vendor-specific information. The ...
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NXP Semiconductors Start Initialize the Endpoint Index register to 0 Set bit DSEN in the Control Function register Yes Wait for OUT token ACK EP0Rx == 0 No Clear EP0Rx bit Initialize the Endpoint Index register to 0 Read the ...
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NXP Semiconductors Start DMA_Test_Mode != PIO Yes Stop the CPLD DMA controller Reset the CPLD DMA controller Is master mode No Initialize the CPLD DMA controller for Slave Read mode No Set the CPLD DMA mode Initialize the DMA Endpoint ...
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NXP Semiconductors Start DMA_Test_Mode != PIO Yes Stop the CPLD DMA controller Reset the CPLD DMA controller Is master mode No Initialize the CPLD DMA controller for Slave Write mode No Set CPLD DMA mode Initialize the DMA Endpoint register ...
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NXP Semiconductors Start Enable CPLD PIO mode Issue the CPLD PIO Reset command Initialize the Endpoint Index register to the respective OUT endpoint Is the device full-speed No PIO_maxpacket_size = 512 PIO_Bytes_Remaining = FileSize.Size D PIO_Bytes_Remaining != 0 Yes PIO_Bytes_Remaining ...
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NXP Semiconductors Start Initialize the Endpoint Index register to the respective IN endpoint Enable CPLD PIO mode Issue the CPLD PIO Reset command Is the device full-speed? PIO_maxpacket_size = No PIO_maxpacket_size = 512 PIO_Bytes_Remaining = FileSize.Size PIO_Bytes_Remaining != 0 Yes ...
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NXP Semiconductors Start Initialize the Endpoint Index register to 0 Set bit DSEN in the Control Function register Yes Wait for OUT token ACK EP0Rx == 0 No Clear EP0Rx bit Initialize the Endpoint Index register to 0 Read the ...
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NXP Semiconductors 7. Legal information 7.1 Definitions Draft — The document is a draft version only. The content is still under internal review and subject to formal approval, which may result in modifications or additions. NXP Semiconductors does not give ...
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NXP Semiconductors 8. Contents 1. Introduction .........................................................3 2. ISP1582/83 initialization routine.........................4 2.1 Initializing the ISP1582/83 registers ......................4 2.2 Initializing the Mode register..................................5 2.3 Initializing the Interrupt Configuration register .......5 2.4 Initializing the Interrupt Enable register .................7 2.5 Initializing the DMA ...