IC INTERFACE CIRCUIT 44 TQFP

 

STLC3055Q

Manufacturer Part NumberSTLC3055Q
DescriptionIC INTERFACE CIRCUIT 44 TQFP
ManufacturerSTMicroelectronics
STLC3055Q datasheets

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Specifications of STLC3055Q

Applications*Interface*
Voltage - Supply*Package / Case44-LQFP
Mounting TypeSurface MountLead Free Status / RoHS StatusContains lead / RoHS non-compliant
Other names497-2145  
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STLC3055N
Figure 6.
Metering pulse generation circuit.
BURST
SHAPING
GENERATOR
D0
CKTTX
Square wave pulse metering
The waveform so generated is then filtered and injected on the line.
The low pass filter can be obtained using the integrated buffer OP1 connected between pin
FTTX (OP1 non inverting input) and RTTX (OP1 output) (see
"Sallen and Key" configuration. Depending on the external components count it is possible
to build an optimised application depending on the distortion level required. In particular
harmonic distortion levels equal to 13 %, 6 % and 3 % can be obtained respectively with
first, second and third order filters (see
The circuit showed in
page 20
is related to the simple first order filter.
Once the shaped and filtered signal is obtained at RTTX buffer output it is injected on the
TIP/RING pins with a +6 dB gain or +12 dB gain.
It should be noted that this is the nominal condition obtained in presence of ideal TTX echo
cancellation (obtained via proper setting of RTTX and CTTX).
In addition, the effective level obtained on the line will depend on the line impedance and the
protection resistors value. In the typical application (TTX line impedance =200 Ω, RP = 50 Ω,
and ideal TTX echo cancellation) the metering pulse level on the line will be 1.33 or 2.66
times the level applied to the RTTX pin.
As already mentioned the metering pulse echo cancellation is obtained by means of two
external components (RTTX and CTTX) that should match the line impedance at the TTX
frequency. This simple network has a double effect:
●
Synthesize a low output impedance at the TIP/RING pins at the TTX frequency.
●
Cut the eventual TTX echo that will be transferred from the line to the TX output.
4.2.4
Ringing
When this mode is selected STLC3055N self generate an higher negative battery (-70 V
typ.) in order to allow a balanced ringing signal of typically 65 Vpeak.
In this condition both the DC and AC feedback are disabled and the SLIC line drivers
operate as voltage buffers. The ring waveform is obtained toggling the D2 control bit at the
Low Pass Filter
CTTX1
RLV
R1
SQTTX
CS
CFL
RLV
Required external components vs. filter order.
CTTX2
Order
Figure
6).
Figure 8: Application diagram with metering pulse generation. on
Functional description
C1
RTTX
-
R2
FTTX
OP1
+
C2
Sinusoidal wave
pulse metering
CFL
R1
C1
R2
C2
1
X
2
X
X
X
X
3
X
X
X
X
X
Figure
6) and implementing a
THD
13%
6%
3%
13/34

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