LCMXO2-1200ZE-P-EVN Lattice, LCMXO2-1200ZE-P-EVN Datasheet

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LCMXO2-1200ZE-P-EVN

Manufacturer Part Number
LCMXO2-1200ZE-P-EVN
Description
KIT DEVELOPMENT MACHX02 PICO
Manufacturer
Lattice
Series
MachXO2r
Type
PLDr

Specifications of LCMXO2-1200ZE-P-EVN

Contents
Board, Cable, Documentation
Lead Free Status / Rohs Status
Lead free / RoHS Compliant
For Use With/related Products
LCMXO2-1200ZE-MG132CR1
Other names
220-1168

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
LCMXO2-1200ZE-P-EVN
Manufacturer:
Lattice
Quantity:
64
MachXO2 Pico Development Kit
User’s Guide
July 2011
Revision: EB61_01.3

Related parts for LCMXO2-1200ZE-P-EVN

LCMXO2-1200ZE-P-EVN Summary of contents

Page 1

MachXO2 Pico Development Kit  User’s Guide July 2011 Revision: EB61_01.3 ...

Page 2

... MachXO2 LCMXO2-1200ZE PLD device in a 132-ball csBGA package. The board is designed for density migration, allowing a lower density MachXO2 device to be assembled on the board. - Part number LCMXO2-1200ZE-P-EVN is populated with the R1 silicon. Part number LCMXO2- 1200ZE-P1-EVN is populated with the Standard silicon. The demos have been targeted for a specific version of silicon and are not interchangeable ...

Page 3

... System 17.9.1 (or higher) Demonstration Design Lattice provides the Pico SoC Demo design programmed in the board. The design utilizes the MachXO2 in the con- text of low power applications. The Pico SoC Demo illustrates the use of the LatticeMico8 microcontroller, associated peripherals and firmware to provide a low power system featuring voltage/current measurement, data logging to nonvolatile memory, I/O con- trol, embedded block RAM utilization, UART communication, capacitive touch sense buttons and a LCD controller ...

Page 4

... MachXO2 device and uploads the user menu onto the HyperTerminal window of a PC. Figure 3. HyperTerminal User Menu 2. Users interact with LatticeMico8 microcontroller and the board by selecting the available options in the Hyper- Terminal menu. The available options are: • ‘m’ – This option re-displays the main menu anytime during the demonstration. PICO is displayed on the LCD screen. • ...

Page 5

... This selection will perform a bulk-erase of the Flash memory in the SPI Flash device and will clear (reset) the WRITE and READ page pointers. Setting up the Board Drivers and Firmware Before you begin, you will need to obtain the necessary hardware drivers for Windows from the Lattice web site. 1. Browse to www.latticesemi.com/alpha-mxo2-pico-kit face. ...

Page 6

... Lattice Semiconductor 5. Click Next. A screen will display as Windows copies the required driver files. Windows will display a message indicating that the installation was successful. Programming the MachXO2 Using ispVM System software, users can scan and perform JTAG operations, including programming, with the MachXO2 device ...

Page 7

... Lattice Semiconductor Figure 5. New Connection – COM Port 5. Specify a Name and Icon for the new connection. Click OK. The “Connect To” dialog appears. 6. Select the COM port identified in Step 3 from the Connect using: list. Click OK. Figure 6. Selecting the COM Port 7. The “COMn Properties” dialog appears where “n” is the COM port selected from the list. ...

Page 8

... Lattice Semiconductor Figure 7. COM Port Properties 9. The HyperTerminal window appears. 10. From the MachXO2 Pico Evaluation Board, press the reset push-button with reference designator S1. The Pico SoC demo main menu appears. Setting Up Linux Minicom Minicom is a terminal program found with most Linux distributions. It can be used to communicate with the MachXO2 Pico Evaluation Board ...

Page 9

... Lattice Semiconductor Corp. All Lattice trademarks, registered trademarks, patents, and disclaimers are as listed at www.latticesemi.com/legal. All other brand or product names are trademarks or registered trademarks of their respective holders. The specifications and information herein are subject to change without notice. Ordering Part Number LCMXO2-1200ZE-P-EVN Version 01.0 Initial release. ...

Page 10

... Lattice Semiconductor Appendix A. Schematic Figure 8. USB 5V, MachXO2 Power Rails, 3.0V Battery, 1.2V Rail and Current Monitors MachXO2 Pico Development Kit User’s Guide ...

Page 11

... Lattice Semiconductor Figure 9. Current Sense Amplifiers, Power Enable Mux 8 4 MachXO2 Pico Development Kit User’s Guide ...

Page 12

... Lattice Semiconductor 2 Figure 10. USB to JTAG and I C for the MachXO2 VCCIO 56 VCCIO 42 VCCIO 31 VCCIO 20 VCORE 64 VCORE 37 VCORE 12 VPLL 9 VPHY 4 12 MachXO2 Pico Development Kit User’s Guide GND 51 GND 47 GND 35 GND 25 GND 15 GND 11 GND 5 GND 1 AGND 10 ...

Page 13

... Lattice Semiconductor Figure 11. MachXO2 Banks 0-1, LCD, I MachXO2 Pico Development Kit 2 C Temperature 13 User’s Guide ...

Page 14

... Lattice Semiconductor Figure 12. MachXO2 Banks 2-3, Capacitor Pads, Expansion Header, SPI MachXO2 Pico Development Kit 14 User’s Guide ...

Page 15

... Lattice Semiconductor Figure 13. MachXO2 Power MachXO2 Pico Development Kit 15 User’s Guide ...

Page 16

... Lattice Semiconductor Appendix B. Bill of Materials Item Quantity Reference 1 2 C10,C20 0_1uF 2 3 C1,C2,C21 1uF 3 2 C5,C6 10nF USB_MINI_B 5 35 R2,R8,R11,R13,R14,R15,R1 6,R17,R20,R21,R22,R23,R31 ,R32,R33,R34,R35,R40,R43, R47,R48,R49,R55,R56,R64, R65,R66,R69,R70,R71,R75, R89,R95,R96,R97 6 5 R50,R58,R60,R79,R92 R1,R3,R4,R25,R27,R29,R44, 10k R78 8 1 R59 10k M93C46-WMN6TP TMP101 11 1 R19 R53 U17 AT25DF041A- MH9,MH10,MH11,MH12 ...

Page 17

... IRF240 GlobalReset NCP1117 HEADER 16X2 38 2 C19,C30 0.047uF 39 2 R18,R85 NSR0530P2T5G 41 1 R24 42 2 R80,R84 3. R36 3. U10 LCMXO2-1200-CSBGA132 CSBGA132 LCD-S401M16KR 46 12 R62,R63,R67,R68,R72,R74, 5.49k R76,R77,R82,R83,R86,R87 47 1 R37 48 2 C55,C56 18pF 49 1 C51 3.3uF 50 1 C13 4.7uF 600ohm 500mA 52 1 U23 FT2232HL 12MHZ ...

Page 18

... Lattice Semiconductor Appendix C. Other Features SPI Programming • In order to support SPI programing of the MachXO2 device the zero ohm resistors (R71, R70, R66, R69) will have to be removed • Once removed, the SPI programming pins can be accessed via the header U3 (XO2_SPI_OUT, XO2_SPI_IN, XO2_SPI_CLK, XO2_SPI_SN) – ...

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