DG403DYZ Intersil, DG403DYZ Datasheet

IC SWITCH DUAL DPST 16SOIC

DG403DYZ

Manufacturer Part Number
DG403DYZ
Description
IC SWITCH DUAL DPST 16SOIC
Manufacturer
Intersil
Datasheet

Specifications of DG403DYZ

Function
Switch
Circuit
2 x DPST - NC/NO
On-state Resistance
45 Ohm
Voltage Supply Source
Single, Dual Supply
Voltage - Supply, Single/dual (±)
5 V ~ 34 V, ±5 V ~ 17 V
Current - Supply
0.1µA
Operating Temperature
-40°C ~ 85°C
Mounting Type
Surface Mount
Package / Case
16-SOIC (0.154", 3.90mm Width)
Lead Free Status / RoHS Status
Lead free / RoHS Compliant

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
DG403DYZ
Manufacturer:
ADI/亚德诺
Quantity:
20 000
Company:
Part Number:
DG403DYZ
Quantity:
24
Part Number:
DG403DYZ-T
Manufacturer:
INTERSIL
Quantity:
3 400
Part Number:
DG403DYZ-T
Manufacturer:
INTERSIL
Quantity:
20 000
Monolithic CMOS Analog Switches
The DG401 and DG403 monolithic CMOS analog switches
have TTL and CMOS compatible digital inputs.
These switches feature low analog ON resistance (<45Ω)
and fast switch time (t
simplifies sample and hold applications.
The improvements in the DG401, DG403 series are made
possible by using a high voltage silicon-gate process. An
epitaxial layer prevents the latch-up associated with older
CMOS technologies. The 44V maximum voltage range
permits controlling 30V
single-ended from +5V to +34V, or split from ±5V to ±17V.
The analog switches are bilateral, equally matched for AC or
bidirectional signals. The ON resistance variation with analog
signals is quite low over a ±15V analog input range. The three
different devices provide the equivalent of two SPST (DG401)
or two SPDT (DG403) relay switch contacts with CMOS or
TTL level activation. The pinout is similar, permitting a
standard layout to be used, choosing the switch function as
needed.
Pinouts
NOTE: (NC) No Connection.
NC
NC
NC
NC
NC
NC
NC
NC
D
D
S
S
D
D
D
D
1
3
3
4
4
2
1
2
(16 LD SOIC, TSSOP)
(16 LD SOIC, TSSOP)
1
2
3
4
5
6
7
8
ON
1
2
3
4
5
6
7
8
P-P
<150ns). Low charge injection
TOP VIEW
TOP VIEW
signals. Power supplies may be
DG401
DG403
®
1
Data Sheet
16
15
14
13
12
11
10
16
15
14
13
12
11
10
9
9
S
IN
V-
GND
V
V+
IN
S
S
IN
V-
GND
V
V+
IN
S
1
L
2
1
L
2
1
2
1
2
1-888-INTERSIL or 1-888-468-3774
CAUTION: These devices are sensitive to electrostatic discharge; follow proper IC Handling Procedures.
Features
• ON Resistance (Max) . . . . . . . . . . . . . . . . . . . . . . . . . 45Ω
• Low Power Consumption (P
• Fast Switching Action
• Low Charge Injection
• DG401 Dual SPST; Same Pinout as HI-5041
• DG403 Dual SPDT; DG190, IH5043, IH5151, HI-5051
• TTL, CMOS Compatible
• Single or Split Supply Operation
• Pb-Free Plus Anneal Available (RoHS Compliant)
Applications
• Audio Switching
• Battery Operated Systems
• Data Acquisition
• Hi-Rel Systems
• Sample and Hold Circuits
• Communication Systems
• Automatic Test Equipment
Ordering Information
*Add “-T” suffix for tape and reel.
NOTE: Intersil Pb-free plus anneal products employ special Pb-free
material sets; molding compounds/die attach materials and 100%
matte tin plate termination finish, which are RoHS compliant and
compatible with both SnPb and Pb-free soldering operations. Intersil
Pb-free products are MSL classified at Pb-free peak reflow
temperatures that meet or exceed the Pb-free requirements of
IPC/JEDEC J STD-020.
DG401DY*
DG401DYZ*
(Note)
DG401DVZ*
(Note)
DG403DY*
DG403DYZ*
(Note)
DG403DVZ*
(Note)
NUMBER*
November 20, 2006
- t
- t
PART
ON
OFF
Copyright © Intersil Americas Inc. 1999, 2002-2004, 2006. All Rights Reserved
All other trademarks mentioned are the property of their respective owners.
(Max) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 150ns
(Max) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 100ns
|
Intersil (and design) is a registered trademark of Intersil Americas Inc.
DG401DY
DG401DYZ
DG401 DVZ
DG403DY
DG403DYZ
DG403 DVZ
MARKING
PART
RANGE (°C)
-40 to +85 16 Ld SOIC
-40 to +85 16 Ld SOIC
-40 to +85 16 Ld TSSOP
-40 to +85 16 Ld SOIC
-40 to +85 16 Ld SOIC
-40 to +85 16 Ld TSSOP
TEMP.
D
) . . . . . . . . . . . . . . . . . . .<35μW
DG401, DG403
(Pb-free)
(Pb-free)
(Pb-free)
(Pb-free)
PACKAGE
FN3284.11
M16.15
M16.15
M16.173
M16.15
M16.15
M16.173
DWG. #
PKG.

Related parts for DG403DYZ

DG403DYZ Summary of contents

Page 1

... MARKING RANGE (°C) PACKAGE DG401DY - SOIC DG401DYZ - SOIC (Pb-free) DG401 DVZ - TSSOP (Pb-free) DG403DY - SOIC DG403DYZ - SOIC (Pb-free) DG403 DVZ - TSSOP (Pb-free) | Intersil (and design registered trademark of Intersil Americas Inc. PKG. DWG. # M16.15 M16.15 M16.173 M16 ...

Page 2

TRUTH TABLE DG401 LOGIC SWITCH SWITCH OFF OFF NOTE: Logic “0” ≤0.8V. Logic “1” ≥2.4V. Functional Diagrams DG401 ...

Page 3

Absolute Maximum Ratings ...

Page 4

Electrical Specifications Test Conditions +15V -15V, V Unless Otherwise Specified (Continued) PARAMETER POWER SUPPLY CHARACTERISTICS Positive Supply Current, I+ Negative Supply Current, I- Logic Supply Current Ground Current, I GND NOTES ...

Page 5

Test Circuits and Waveforms 3V LOGIC INPUT 90% SWITCH OUTPUT ( SWITCH OUTPUT ( FIGURE 2A. MEASUREMENT POINTS SWITCH ΔV O OUTPUT OFF IN ...

Page 6

Test Circuits and Waveforms +15V V+ C SIGNAL V GENERATOR S1 IN 0V, 2. ANALYZER R L GND -15V FIGURE 6. CROSSTALK TEST CIRCUIT Application Information Dual Slope Integrators The DG403 is well suited to configure a ...

Page 7

Typical Performance Curves 15V V- = -15V 20° (V) L FIGURE 10. INPUT SWITCHING THRESHOLD vs LOGIC SUPPLY VOLTAGE ...

Page 8

Typical Performance Curves 0.0 -0.5 -1.0 -1 15V -15V RMS SEE INSERTION LOSS TEST SETUP -2.0 (FIGURE 5) 10K 100K FREQUENCY (Hz) FIGURE 16. INSERTION LOSS vs FREQUENCY ...

Page 9

Typical Performance Curves NOT MEASURABLE DUE TO CAPACITIVE FEEDTHROUGH -5 -10 -20 SEE BBM TEST SETUP (FIGURE 2) - BREAK-BEFORE-MAKE TIME (ns) FIGURE 22. BREAK-BEFORE-MAKE vs ANALOG VOLTAGE 600 540 480 420 ...

Page 10

Typical Performance Curves FIGURE 28. SWITCHING TIME vs POSITIVE SUPPLY VOLTAGE (NOTE 8) NOTE: 8. Refer to Figure 1 for test conditions. 10 (Continued) 300 270 240 210 V- = -5V 180 t ON 150 V- = -15V 120 V- ...

Page 11

Thin Shrink Small Outline Plastic Packages (TSSOP) N INDEX 0.25(0.010) E AREA E1 - 0.05(0.002) SEATING PLANE - -C- α 0.10(0.004) 0.10(0.004 NOTES: 1. These package ...

Page 12

... Accordingly, the reader is cautioned to verify that data sheets are current before placing orders. Information furnished by Intersil is believed to be accurate and reliable. However, no responsibility is assumed by Intersil or its subsidiaries for its use; nor for any infringements of patents or other rights of third parties which may result from its use ...

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