DVK90129 Melexis Inc, DVK90129 Datasheet - Page 29

• Manufacturer Part Number: DVK90129
• Description: DEVELOPMENT KIT MLX90129
• Manufacturer: Melexis Inc
• Series: -r
• Type: Development kitr

Specifications of DVK90129

• Contents: Board, Proxima RF™ Desktop Reader
• Lead Free Status / Rohs Status: Lead free / RoHS Compliant
• For Use With/related Products: MLX90129

8.2.3 SPI interruptions
The SPI I/O signals are accompanied of an output interrupt signal IRQ. This signal may be used to wake up
or to warn the SPI master (micro-controller) about some access conflicts or some general problems (low
battery level, external event …). It is set once one of the selected events occur. It is reset once the SPI
master has read the SPI Core interrupt / status word, or has set the bit Disable IRQ setting of the SPI Core
control word.
SPI Core control word (Device address domain, address #00, read/write)
3901090129
Rev 007
Bits
#00 – SPI Core control word
15:7
6
5
4
3
2
1
0
Name
-
Irq_Rfid_ Reg_Access_En
Irq_Rfid_EEp_Access_En
Irq_Rfid_Field_En
Irq_Last_Trans_En
Irq_Dis
Core_Sts_Irq_En
Core_Lock
Description (if bit=1)
Reserved (must be 0)
RFID interrupts control:
Enable RFID Interrupt 2 (Access to Register file).
Enable RFID Interrupt 1 (Access to EEPROM).
Enable RFID Interrupt 0 (RFID field is detected).
End of transaction
Enable interrupt indicating the completion of the last requested
transaction. To de-assert this interrupt, the user will request another
transaction, read the SPI local data buffer (in device address
domain), disable this interrupt or block IRQ assertion.
Disabled IRQ setting.
Disable the setting of the IRQ signal.
Core status interrupt enabled.
Enable the interrupt on IRQ telling that the system is free.
Core lock.
Lock any transactions between the different internal devices and the
non-SPI interfaces. This allows having an access from SPI to any
registers at any time. The last pending transaction is always
completed.
13.56MHZ SENSOR TAG / DATALOGGER IC
Page 29 of 56
MLX90129
Data Sheet
March 2011