HI-6010CT Holt Integrated Circuits, HI-6010CT Datasheet

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HI-6010CT

Manufacturer Part Number
HI-6010CT
Description
Manufacturer
Holt Integrated Circuits
Datasheet

Specifications of HI-6010CT

Operating Temperature Classification
Military
Operating Temperature (max)
125C
Rad Hardened
No
Lead Free Status / Rohs Status
Compliant
(DS6010 Rev.E)
(
GENERAL DESCRIPTION
The HI-6010 is a CMOS integrated circuit designed to
interface the avionics data bus standard ARINC 429 to an
8 bit port. It contains one receiver and one transmitter.
They operate independently except for the self test option
and the parity option. The receiver demands that the
incoming data meet the standard protocol and the
transmitter outputs a standard protocol stream.
The HI-6010 provides flexible options for interfacing to the
user system. The controlling processor can operate both
the receiver and transmitter either by using hard wired
flags and gates at the pins or by using software reads and
writes of the Status Register and Control Register or a
combination thereof.
The chip is programmable to operate with single 8 bit
bytes requiring "on the fly transmitter loading and receiver
downloading" or to operate in 32 bit "extended buffer"
mode. In addition there is an option to use automatic label
recognition after loading 8 possible labels for comparison.
Parity and self test are also software programmable.
Master Reset is activated only by taking the MR pin high.
Two clock inputs allow independent selection of the data
rates of the transmitter and receiver. Each must be 4X the
desired ARINC 429 frequency.
Error flags are generated for transmitter underwrites and
for receiver data framing miscues, parity errors, and buffer
overwrites.
The HI-6010 is a 5 volt chip that will require data transla-
tion from and to the ARINC bus. The HI-8482 and HI-8588
line receivers are available for the receiver side and the
HI-318X and HI-858X line drivers are available for the
transmitter side.
APPLICATIONS
March 2007
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!
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Avionics Data Communication
Serial to Parallel Conversion
Parallel to Serial Conversion
HOLT INTEGRATED CIRCUITS
www.holtic.com
Transmitter / Receiver for 8-Bit Bus
FEATURES
PIN CONFIGURATION
OPERATING SUPPLY VOLTAGE
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Pin numbers apply for plastic and ceramic DIP and
for plastic PLCC. Consult factory for pin out of 48
lead ceramic leadless chip carrier.
RXRDY 8
TXRDY 9
ARINC 429 protocol controller with interface to
an 8 bit bus
Automatic label recognition option
8 bit or 32 bit buffering option
Self test and parity options
CMOS / TTL logic pins
Plastic and ceramic package options - surface
mount or DIP
Military processing available
VDD = 5.0 VOLTS ±5%
VSS = 0.0 VOLTS
RXD0 14
TXD0 10
TXD1 11
WEF 2
RXC 12
CTS
TXC 4
HFS 5
FCR 13
TXE 7
V
MR 6
SS
1
3
HI-6010
ARINC 429
28
27 C/
26
25
24 D7
23 D6
22 D5
21 D4
20 D3
19 D2
18 D1
17 D0
16 RXD1
15 V
(Top View)
RE
CS
WE
DD
D
03/07

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HI-6010CT Summary of contents

Page 1

... Error flags are generated for transmitter underwrites and for receiver data framing miscues, parity errors, and buffer overwrites. The HI-6010 volt chip that will require data transla- tion from and to the ARINC bus. The HI-8482 and HI-8588 line receivers are available for the receiver side and the HI-318X and HI-858X line drivers are available for the transmitter side ...

Page 2

... HI-6010 DESCRIPTION 0.0 Volts Error indication if high. Status register must be read to determine specific error. Enables data transmission when low. Source clock for data transmission. 4 times bit rate. Hardware feature select. Master reset, active high. ...

Page 3

... This pin must have a clock applied that is 4X the desired receive frequency. PIN 13 - FCR In 8 bit mode, this pin flags the first character (byte) received bit mode, this pin goes high for a valid 32 bit word. The pin is not affected by CR3 programming. HI-6010 PIN 14 - RXD0 and PIN 16 - RXD1 These pins must be 5 volt logic levels ...

Page 4

... PIN 10 - TXD0 and PIN 11 - TXD1 TXD0 will go high during a transmission if the data is zero. TXD1 goes high if data is a one. When both pins are low this is referred to as the Null state. transmitter chip, such as the HI-3182, HI-3183, HI-8585 or HI-8586 is connected to these pins to translate the 5 volt levels to the proper ARINC bus levels ...

Page 5

... With Pin 5 low, Control Register Bit 5 selects if the 32nd bit is either odd parity or data Pulse P = Pulse X = Don't Care X = Don't Care HI-6010 Load Control Word TXRDY & TXE Go Low After Load Data TD3 TD2 TD1 Monitor Pin High After Pin 9 High Then Load Next Byte Monitor Pin High Load Monitor Pin High Load Transmission Complete ...

Page 6

... Read 2nd Byte Read 3rd Byte Read 4th Byte Write CR Monitor the Status Register & High - First Character Read 1st Byte RD3 RD2 RD1 Look for High Again Read 2nd Byte Look for High Again Read 3rd Byte Look for High Again ...

Page 7

... TD24 TD23 TD22 TD21 TD20 TD19 TD18 TD17 D31 TD30 TD29 TD28 TD27 TD26 TD25 Pulse P = Pulse X = Don't Care X = Don't Care HI-6010 Load Control Word & Load Data to Transmit - Byte 1 TD3 TD2 TD1 Load Data to Transmit - Byte Load Data to Transmit - Byte 3 ...

Page 8

... 7L7 7L6 7L5 7L4 7L3 8L7 8L6 8L5 8L4 8L3 P = Pulse P = Pulse X = Don't Care X = Don't Care HI-6010 LOADING LABELS Control Bit 7 Must Be 0 First Write 1 into Control Bit 7 1L2 1L1 1L0 Load the 1st Label ...

Page 9

... C/D t CDS DATA VALID BUS t CSSR CS Figure 1. TRANSMTTER OPERATION CTS t CTL t CPW TXE t ENDAT TXD0/ FIRST TXD1 BIT TXRDY Figure 3. HI-6010 DATA BUS TIMING - WRITE C/D t CDH DATA BUS t CSHR CS t DTX LAST t BIT TXRY HOLT INTEGRATED CIRCUITS 9 VALID CDH CDS WP ...

Page 10

... CTL t ENDAT t TXRDY t TDTX t CPW HOLT INTEGRATED CIRCUITS 10 P 500mW D T (Industrial) -40°C to +85° (Hi temp & Military) -55°C to +125° -65°C to +150°C STG T 300°C for 60 Seconds LEAD MIN TYP MAX UNITS 4.75 5 5.25 V 2.1 1.4 V 1.4 0.7 V 1.5 µ ...

Page 11

... ORDERING INFORMATION HI - 6010C x-xx PART NUMBER Blank T M-01 PART NUMBER 6010C HI - 6010J x x PART NUMBER Blank F PART NUMBER Blank T PART NUMBER 6010J HI-6010 TEMPERATURE BURN RANGE FLOW IN -40°C TO +85° -55°C TO +125° -55°C TO +125°C M Yes PACKAGE DESCRIPTION 28 PIN CERAMIC SIDE BRAZED DIP (28C) ...

Page 12

... SQ. .173 ±.008 (4.394 ±.203) BSC = “Basic Spacing between Centers” is theoretical true position dimension and has no tolerance. (JEDEC Standard 95) HI-6010 PACKAGE DIMENSIONS 1.400 ±.014 (35.560 ±.356) .595 ±.010 (15.113 ±.254) .050 typ (1.270) .085 ± ...

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