ISL54200IRZ Intersil, ISL54200IRZ Datasheet
ISL54200IRZ
Specifications of ISL54200IRZ
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ISL54200IRZ Summary of contents
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... CAUTION: These devices are sensitive to electrostatic discharge; follow proper IC Handling Procedures. | 1-888-INTERSIL or 1-888-468-3774 Intersil (and design registered trademark of Intersil Americas Inc. Copyright Intersil Americas Inc. 2007, 2010. All Rights Reserved All other trademarks mentioned are the property of their respective owners 2.7V to 5.5V ...
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... NOTE: 1. ISL54200 Switches Shown for IN = Logic “0” and EN = Logic “1”. Ordering Information PART NUMBER PART (Note 5) MARKING ISL54200IRZ (Note 3) 200Z ISL54200IRZ-T (Note 2, 3) 200Z ISL54200IRUZ-T (Note ISL54200EVAL1Z Evaluation Board NOTES: 2. Please refer to TB347 for details on reel specifications. 3. These Intersil Pb-free plastic packaged products employ special Pb-free material sets, molding compounds/die attach materials, and 100% matte tin plate plus anneal (e3 termination finish, which is RoHS compliant and compatible with both SnPb and Pb-free soldering operations) ...
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Truth Table ISL54200 EN IN FSD1, FSD2 HSD1, HSD2 OFF 0 X OFF Logic “0” when ≤0.5V, Logic “1” when ≥1.4V with a 2.7V to 3.6V Supply Don’t Care 3 ISL54200 ISL54200 Pin ...
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... Ld µTQFN (Notes +0.3V TDFN (Notes 9, 10 +0.3V) Maximum Junction Temperature (Plastic Package Maximum Storage Temperature Range -65°C to +150°C Pb-free reflow profile . . . . . . . . . . . . . . . . . . .see link below http://www.intersil.com/pbfree/Pb-FreeReflow.asp Operating Conditions Temperature Range . . . . . . . . . . . . . . . . . . -40°C to +85°C V Supply Voltage Range . . . . . . . . . . . . . . . 2.7V to 5.5V DD Test Conditions ...
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Electrical Specifications - 2.7V to 3.6V Supply PARAMETER ON-Resistance HSD2 ON-Resistance HSD2 r Matching Between Channels, Δ HSD2 max r (Note 15) r Flatness, r ...
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Electrical Specifications - 2.7V to 3.6V Supply PARAMETER FSx OFF Capacitance 1MHz, V FSxOFF V FSD1 COM ON Capacitance 1MHz COMX(ON) HSD1 COM ON Capacitance 1MHz COMX(ON) ...
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Test Circuits and Waveforms VINH LOGIC INPUT VINL SWITCH OUTPUT VOUT 0V FIGURE 2A. MEASUREMENT POINTS r = V1/ICOMx ON HSx VHSX V1 ICOMx COMx GND Repeat test for all switches. FIGURE 3. HSx SWITCH ISL54200 ISL54200 ...
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Test Circuits and Waveforms EN HSx or FSx IMPEDANCE ANALYZER COMx GND Repeat test for all switches. FIGURE 5. CAPACITANCE TEST CIRCUIT t ri 90% 50% 10% DIN+ t skew_i DIN- 90% 50% 10 90% 10% ...
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Application Block Diagram VBUS D- D+ GND Detailed Description The ISL54200 device is a dual single pole/double throw (SPDT) analog switch that operates from a single DC power supply in the range of 2.7V to 5.5V. It was designed to ...
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USB 2.0 full-speed signaling. See Figure 11. The maximum signal range for the HSx switches is from -1. The signal voltage should not be allowed to DD exceed the V voltage rail or go below ...
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Typical Performance Curves FIGURE 8. EYE PATTERN: 12MBPS USB SIGNAL WITH FSx SWITCHES IN THE SIGNAL PATH 11 ISL54200 ISL54200 T = +25°C, Unless Otherwise Specified A TIME SCALE (10ns/DIV 3.3V DD FN6408.2 June 17, 2010 ...
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Typical Performance Curves FIGURE 9. EYE PATTERN WITH FAR END MASK: 480MBPS USB SIGNAL WITH HSx SWITCHES IN THE SIGNAL PATH 12 ISL54200 ISL54200 T = +25°C, Unless Otherwise Specified (Continued) A TIME SCALE (0.2ns/DIV 3.3V DD FN6408.2 ...
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Typical Performance Curves FIGURE 10. EYE PATTERN WITH NEAR END MASK: 480MBPS USB SIGNAL WITH HSx SWITCHES IN THE SIGNAL PATH 13 ISL54200 ISL54200 T = +25°C, Unless Otherwise Specified (Continued) A TIME SCALE (0.2ns/DIV 3.3V DD FN6408.2 ...
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Typical Performance Curves FIGURE 11. EYE PATTERN: 12MBPS USB SIGNAL WITH HSx SWITCHES IN THE SIGNAL PATH 14 ISL54200 ISL54200 T = +25°C, Unless Otherwise Specified (Continued) A TIME SCALE (10ns/DIV 3.3V DD FN6408.2 June 17, 2010 ...
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Typical Performance Curves 6 3. 40mA COM 5.5 +85°C 5.0 +25°C 4.5 4.0 -40°C 3 0.1 0.2 V (V) COM FIGURE 12. HSx SWITCH ON-RESISTANCE vs SWITCH VOLTAGE -10 -20 -30 -40 -50 -60 ...
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... Accordingly, the reader is cautioned to verify that data sheets are current before placing orders. Information furnished by Intersil is believed to be accurate and reliable. However, no responsibility is assumed by Intersil or its subsidiaries for its use; nor for any infringements of patents or other rights of third parties which may result from its use. No license is granted by implication or otherwise under any patent or patent rights of Intersil or its subsidiaries ...
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Package Outline Drawing L10.2.1x1.6A 10 LEAD ULTRA THIN QUAD FLAT NO-LEAD PLASTIC PACKAGE Rev 5, 3/10 2.10 B 0.10 2X TOP VIEW (10 X 0.20) (10X 0.60) (2.00) (0.80) (1.30) (6X 0.50 ) (2.50) TYPICAL RECOMMENDED LAND PATTERN 17 ISL54200 ...
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... Dimensions D2 and E2 are for the exposed pads which provide M 0. improved electrical and thermal performance. 8. Nominal dimensions are provided to assist with PCB Land Pattern Design efforts, see Intersil Technical Brief TB389. 9. Compliant to JEDEC MO-229-WEED-3 except for D2 dimensions TERMINAL TIP ( 2.90 ) MILLIMETERS ...