74LVC2G53DP,125 NXP Semiconductors, 74LVC2G53DP,125 Datasheet - Page 17

• Manufacturer Part Number: 74LVC2G53DP,125
• Description: IC MUX/DEMUX 2X1 8TSSOP
• Manufacturer: NXP Semiconductors
• Series: 74LVCr
• Type: Analog Multiplexerr

Specifications of 74LVC2G53DP,125

• Package / Case: 8-TSSOP
• Function: Multiplexer/Demultiplexer
• Circuit: 1 x 2:1
• On-state Resistance: 6 Ohm
• Voltage Supply Source: Single Supply
• Voltage - Supply, Single/dual (±): 1.65 V ~ 5.5 V
• Current - Supply: 0.1µA
• Operating Temperature: -40°C ~ 125°C
• Mounting Type: Surface Mount
• Number Of Channels: 1 Channel
• On Resistance (max): 34 Ohm (Typ) @ 1.95 V
• On Time (max): 6.7 ns (Typ) @ 1.95 V
• Off Time (max): 6.8 ns (Typ) @ 1.95 V
• Supply Voltage (max): 5.5 V
• Supply Voltage (min): 1.65 V
• Maximum Power Dissipation: 250 mW
• Maximum Operating Temperature: + 125 C
• Minimum Operating Temperature: - 40 C
• Mounting Style: SMD/SMT
• Number Of Switches: Single
• Switch Current (typ): 0.0001 mA @ 5.5 V
• Package: 8TSSOP
• Maximum On Resistance: 195@1.95V Ohm
• Maximum Propagation Delay Bus To Bus: 2.5@1.95V@-40C to 125C|1.5@2.7V@-40C to 125C|1@3.6V@-40C to 125C|0.8@5.5V@-40C to 125C ns
• Maximum Low Level Output Current: 50 mA
• Multiplexer Architecture: 2:1
• Maximum Turn-off Time: 6.8(Typ)@1.95V ns
• Maximum Turn-on Time: 6.7(Typ)@1.95V ns
• Power Supply Type: Single
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant, Lead free / RoHS Compliant
• Other names: 74LVC2G53DP-G; 74LVC2G53DP-G; 935280383125

NXP Semiconductors
12. Package outline
Fig 23. Package outline SOT505-2 (TSSOP8)
74LVC2G53
Product data sheet
TSSOP8: plastic thin shrink small outline package; 8 leads; body width 3 mm; lead length 0.5 mm
DIMENSIONS (mm are the original dimensions)
Note
1. Plastic or metal protrusions of 0.15 mm maximum per side are not included.
UNIT
mm
VERSION
OUTLINE
SOT505-2
max.
1.1
A
0.15
0.00
A 1
8
1
0.95
0.75
A 2
y
pin 1 index
IEC
e
Z
0.25
A 3
D
0.38
0.22
b p
b p
All information provided in this document is subject to legal disclaimers.
0
5
0.18
0.08
4
JEDEC
c
- - -
w
REFERENCES
Rev. 6 — 27 September 2010
D
3.1
2.9
M
(1)
E
3.1
2.9
(1)
c
JEITA
scale
0.65
2.5
e
A
H E
4.1
3.9
A 2
A 1
2-channel analog multiplexer/demultiplexer
0.5
L
H E
E
5 mm
0.47
0.33
detail X
L p
0.2
v
L
L p
PROJECTION
EUROPEAN
0.13
w
A
(A 3 )
74LVC2G53
0.1
y
X
v
θ
M
0.70
0.35
Z
© NXP B.V. 2010. All rights reserved.
A
(1)
ISSUE DATE
02-01-16
8°
0°
θ
SOT505-2
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