ISL54225IRTZ Intersil, ISL54225IRTZ Datasheet
ISL54225IRTZ
Specifications of ISL54225IRTZ
Related parts for ISL54225IRTZ
ISL54225IRTZ Summary of contents
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... TRANSCEIVER USB TRANSCEIVER CAUTION: These devices are sensitive to electrostatic discharge; follow proper IC Handling Procedures. | 1-888-INTERSIL or 1-888-468-3774 Intersil (and design registered trademark of Intersil Americas Inc. All other trademarks mentioned are the property of their respective owners 2.7V to 5.25V DD (see page 16) TIME SCALE (0.2ns/DIV) ...
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Pin Configuration ISL54225 (10 LD 1.8X1.4 µTQFN) TOP VIEW HSD1+ HSD1 VDD 9 OVP SEL HSD2- HSD2+ NOTE: 1. Switches Shown for SEL = Logic “1” and OE = Logic “0”. Pin Descriptions ...
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... Ordering Information PART NUMBER MARKING ISL54225IRUZ-T (Notes 2, 3) ISL54225IRUZ-T7A (Notes 2, 3) ISL54225IRTZ (Note 4) ISL54225IRTZ-T (Notes 2, 4) ISL54225IRTZEVAL1Z Evaluation Board NOTES: 2. Please refer to TB347 for details on reel specifications. 3. These Intersil Pb-free plastic packaged products employ special Pb-free material sets; molding compounds/die attach materials and NiPdAu plate - e4 termination finish, which is RoHS compliant and compatible with both SnPb and Pb-free soldering operations ...
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... Ld µTQFN Package (Note TDFN Package (Notes 8, 9). . Maximum Junction Temperature (Plastic Package). . Maximum Storage Temperature Range . . . -65°C to +150°C Pb-Free Reflow Profile . . . . . . . . . . . . . . . . . .see link below http://www.intersil.com/pbfree/Pb-FreeReflow.asp Recommended Operating Conditions Temperature Range . . . . . . . . . . . . . . . . . . -40°C to +85°C V Supply Voltage Range . . . . . . . . . . . . . . 2.7V to 5.25V DD Logic Control Input Voltage ...
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Electrical Specifications - 2.7V to 5.25V Supply PARAMETER ON Leakage Current 5.25V, SEL = 3.3V, V HSD2x(ON) HSD2x Power OFF Leakage Current SEL = ...
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Electrical Specifications - 2.7V to 5.25V Supply PARAMETER COM ON Capacitance 240MHz (see Figure 4) DX(ON) POWER SUPPLY CHARACTERISTICS Power Supply Range Positive Supply Current 5.25V, SEL = ...
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Test Circuits and Waveforms VDD LOGIC 50% INPUT 0V t OFF SWITCH V INPUT INPUT 90% SWITCH OUTPUT Logic input waveform is inverted for switches that have the opposite logic sense. FIGURE 1A. MEASUREMENT POINTS VDD LOGIC ...
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Test Circuits and Waveforms HSDxx IMPEDANCE ANALYZER Dx GND Repeat test for all switches. FIGURE 4. CAPACITANCE TEST CIRCUIT t ri 90% 50% 10% DIN+ t skew_i DIN- 90% 50% 10 90% 10% 50% OUT+ t ...
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Application Block Diagram ISL54225 SEL VBUS GND Detailed Description The ISL54225 device is a dual single pole/double throw (SPDT) analog switch configured as a DPDT that operates from a single DC power supply in the range ...
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The HS1 channel switches are active (turned ON) whenever the SEL voltage is logic “0”(Low) and the OE voltage is logic “0”(Low). The HS2 channel switches are active (turned ON) whenever the SEL voltage is logic “1” (High) and the ...
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LOGIC CONTROL The state of the ISL54225 device is determined by the voltage at the SEL pin and the OE pin. SEL is only active when the OE pin is logic “0” (Low). Refer to “Truth Table” on page 2. ...
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Typical Performance Curves 6 17mA COM 6.4 2.7V 6.3 6.2 6.1 3.0V 6.0 3.3V 5.9 3.6V 4.3V 5.8 5.7 5.25V 5.6 0 0.1 0.2 V (V) COM FIGURE 9. ON-RESISTANCE vs SUPPLY VOLTAGE vs SWITCH VOLTAGE 12 I ...
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Typical Performance Curves 2. 17mA COM +85° -40° 0.6 1.2 1.8 V (V) COM FIGURE 15. ON-RESISTANCE vs SWITCH VOLTAGE 1.6 -40°C TO +85°C 1.4 V INH ...
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Typical Performance Curves V = 3.3V DD FIGURE 21. EYE PATTERN: 480Mbps WITH USB SWITCHES IN THE SIGNAL PATH FIGURE 22. EYE PATTERN: 12Mbps WITH USB SWITCHES IN THE SIGNAL PATH 14 ISL54225 T = +25°C, Unless Otherwise Specified (Continued) ...
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Typical Performance Curves 50Ω 0dBm, 0.86VDC BIAS IN 1M 10M FREQUENCY (Hz) FIGURE 23. FREQUENCY RESPONSE - 50Ω 0dBm, 0.2VDC BIAS -20 IN -30 ...
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... Accordingly, the reader is cautioned to verify that data sheets are current before placing orders. Information furnished by Intersil is believed to be accurate and reliable. However, no responsibility is assumed by Intersil or its subsidiaries for its use; nor for any infringements of patents or other rights of third parties which may result from its use. No license is granted by implication or otherwise under any patent or patent rights of Intersil or its subsidiaries ...
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Package Outline Drawing L10.1.8x1.4A 10 LEAD ULTRA THIN QUAD FLAT NO-LEAD PLASTIC PACKAGE Rev 5, 3/10 1. 0.10 2X TOP VIEW (9 X 0.60) (10X 0.20) 3 (4X 0.30 TYPICAL RECOMMENDED LAND PATTERN 17 ISL54225 ...
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Package Outline Drawing L10.3x3A 10 LEAD THIN DUAL FLAT NO-LEAD PLASTIC PACKAGE Rev 5, 3/10 3.00 B 3.00 TOP VIEW ( 2.30 ) (2.90 .50 ) TYPICAL RECOMMENDED LAND PATTERN 18 ISL54225 6 A PIN 1 INDEX ...