CY7B933-JCT Cypress Semiconductor Corp, CY7B933-JCT Datasheet
CY7B933-JCT
Specifications of CY7B933-JCT
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CY7B933-JCT Summary of contents
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... HOTLink devices are ideal for a variety of applications where a parallel interface can be replaced with a high-speed point-to-point serial link. Applications include interconnecting workstations, servers, mass storage, and video transmission equipment. CY7B933 Receiver Logic Block Diagram RF A/B FOTO INA+ INA− ...
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... CCQ SVS 1213 1718 h 7 Document #: 38-02017 Rev. *E SERIAL LINK Figure 1. HOTLink System Connections CY7B933 Receiver Pin Configurations INA− OUTB+ INA+ OUTA+ A/B OUTA− BISTEN FOTO RF ENN GND ENA RDY V CCQ GND CKW V GND CCN RVS(Q ) SC/D ...
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... OUTA± and OUTB± CC goes directly to the shifter. When left floating (internal resistors hold the input at a–j CY7B923 CY7B933 ) acts as D input. SC/D has the a a and SC/D determines 0−7 ) acts ...
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... CY7B923 HOTLink Transmitter (continued) Name I/O Description V Power for output drivers. CCN V Power for internal circuitry. CCQ GND Ground. CY7B933 HOTLink Receiver Name I/O Description Q TTL Out Q Parallel Data Output. Q 0−7 0– synchronously with CKR. When MODE is HIGH − h SC/D (Q ...
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... CY7B933 HOTLink Receiver (continued) Name I/O Description REFCLK TTL In Reference Clock. REFCLK is the clock frequency reference for the clock/data synchronizing PLL. REFCLK sets the approximate center frequency for the internal PLL to track the incoming bit stream. REFCLK must be connected to a crystal-controlled time base that runs within the frequency limits of the Tx/Rx pair, and the frequency must be the same as the transmitter CKW frequency (within CKW ± ...
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... Self-Test (BIST) generator, the multiplexer for Test mode clock distribution, and control logic to properly select the data encoding. Test logic is discussed in more detail in the CY7B923 HOTLink Transmitter Operating Mode Description. CY7B933 HOTLink Receiver Block Diagram Description Serial Data Inputs Two pairs of differential line receivers are the inputs for the serial data stream. INA± ...
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... K28.5’s. The latency through the receiver is approximately 24t operating range. A more complete description of the receiver is in the section CY7B933 HOTLink Receiver Operating Mode Description. The HOTLink Receiver has a built-in byte framer that synchro- nizes the Receiver pipeline with incoming SYNC (K28.5) characters ...
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... SERIAL DATA IN ± INX DATA CKR Q , 0−7 SC/D, DATA RVS RDY RDY IS LOW FOR DATA Figure 2. CY7B933 Receiver Data Pipeline in Encoded Mode RF LATCHED ON FALLING EDGE OF CKR CKR 0−7 SC/D, DATA DATA DATA RVS RDY IS HIGH WHILE WAITING FOR K28.5 RDY Figure 3 ...
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... CC This results in a power savings of around 5 mA for each unused pair. In systems that require the outputs to be shut off during some periods when link transmission is prohibited (e.g., for laser CY7B923 CY7B933 CLOCKED FIFO 7C44X/5X Q CKR 0–8 9 ...
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... IB– IA IA– 82 0.01 µF Fiber Optic 8 20 PECL Load Figure 5. HOTLink Connection Diagram CY7B923 CY7B933 ) < (peak-peak). Typically j ) < 175 ps (peak-peak). Typically j 0.01 µF VCC Fiber Optic Fiber Tx TX TX+ TX– GND Coax or Twisted Pair A B 270 270 649 ...
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... RVS output in the Receiver. This can be done by explicitly sending a violation with the SVS input, or allowing the trans- mitter BIST loop to run while the Receiver runs in normal mode. The BIST loop includes deliberate violation symbols and will adequately test the RVS function. CY7B923 CY7B933 OUTA OUTB OUTC SO DON'T CARE ...
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... HIGH while in Test mode. This forces the two outputs “PECL LOW,” which can be ignored while the test system creates a differential input signal at some higher voltage. CY7B933 HOTLink Receiver Operating Mode Description In normal user operation, the Receiver can operate in either of two modes. The Encoded mode allows a user system to send Document #: 38-02017 Rev ...
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... Good code received with wrong RD Receiver Serial Data Requirements The CY7B933 HOTLink Receiver serial input capability conforms to the requirements of the Fibre Channel specifi- cation. The serial data input is tracked by an internal PLL that is used to recover the clock phase and to extract the data from outputs will reflect the serial bit stream ...
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... Receiver Test Mode Description The CY7B933 Receiver offers two types of test mode operation, BIST mode and Test mode normal system application, the Built-In Self-Test (BIST) mode can be used to check the functionality of the Transmitter, the Receiver and the link connecting them. This mode is available with minimal impact on user system logic, and can be used as part of the normal system diagnostics ...
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... Running disparity at the end of any sub-block is negative if the sub-block contains more zeros than ones also CY7B923 CY7B933 Page [+] Feedback ...
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... Transmission Character in which the error occurred. Table 2 shows an example of this behavior. Character RD Character D21.1 – D10.2 101010 1001 – 010101 0101 101010 1011 + 010101 0101 D21.0 + D10.2 CY7B923 CY7B933 Data OUT 765 43210 Hex Value 000 00000 00 000 00001 01 000 00010 02 . ...
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... CY7B923 CY7B933 Page [+] Feedback ...
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... CY7B923 CY7B933 Page [+] Feedback ...
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... CY7B923 CY7B933 Page [+] Feedback ...
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... CY7B923 CY7B933 Page [+] Feedback ...
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... CY7B923 CY7B933 Page [+] Feedback ...
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... CY7B923 CY7B933 Page [+] Feedback ...
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... CY7B923 CY7B933 Page [+] Feedback ...
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... CY7B923 CY7B933 Page [+] Feedback ...
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... Code Rule Violation and SVS Tx Pattern 111 00000 100111 1000 111 00001 001111 1010 111 00010 110000 0101 Running Disparity Violation Pattern 111 00100 110111 0101 CY7B923 CY7B933 Current RD+ fghj abcdei fghj 110000 1011 110000 0110 110000 1010 110000 1100 110000 1101 110000 0101 110000 1001 ...
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... TTL OUTs, CY7B923: RP; CY7B933 Output HIGH Voltage OHT V Output LOW Voltage OLT I Output Short Circuit Current OST TTL INs, CY7B923 SC/D, SVS, ENA, ENN, CKW, FOTO, BISTEN; CY7B933: RF, REFCLK, BISTEN 0−7 V Input HIGH Voltage IHT V Input LOW Voltage ILT I Input HIGH Current IHT ...
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... CY7B923/CY7B933 Electrical Characteristics Parameter Description Miscellaneous [11] I Transmitter Power Supply CCT Current [12] I Receiver Power Supply CCR Current [13] Capacitance Parameter Description C Input Capacitance IN AC Test Loads and Waveforms OUTPUT R1 = 910Ω 510Ω < (Includes fixture and probe capacitance) (a) TTL AC Test Load 3 ...
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... CKW, but not RP function or timing pF. L −2.0V, over the operating range. CC /10 if data is being received. See note. CKW , SC/D, and RVS) are loaded with similar DC and AC loads. 0−7 CY7B923 CY7B933 7B923 7B923-400 Max Min. Max Min. Max Unit 66.7 30.3 62 ...
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... CPWL t SENP t t HENP SD NOTES 16,17 VALID DATA PDF t PDR t PPWH t CKW t CPWH t CPWL and V specification (approximately CY7B923 CY7B933 [7] 7B933 7B933-400 Min. Max. Min. Max. Unit 6.5 6.5 ns 6.5 6 100 100 ps 0.9t 0. CKW DISABLED ENABLED VALID DATA − 1.35V). The TTL switching threshold is 1.5V. ...
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... Switching W0aveforms for the CY7B933 HOTLink Receiver CKR RDY – SC/D,RVS, t CPXL REFCLK NOTE SO Static Alignment /2 − ± INA , ± INB SAMPLE WINDOW Document #: 38-02017 Rev CKR t CPRH t CPRL t t PRH RH t PRF t CKX t CPXH 1.5V Error-free Window /2 − ± INA ± ...
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... CY7B933-SC CY7B933-SXC CY7B933-SXI 400 CY7B933-400JC CY7B933-400JXC CY7B933-400JI 155 CY7B933-155JC CY7B933-155JI Notes: 29. C1.7 = Transmit Negative K28.5 (–K28.5+) disregarding Current RD. The receiver will only output this Special Character if K28.5 is received with the wrong running disparity. The receiver will output C1.7 if −K28.5 is received with RD+, otherwise K28.5 is decoded as C5.0 or C2.7. 30. C2.7 = Transmit Positive K28.5 (+K28.5– ...
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... REFERENCE JEDEC MO-119 0.419[10.64] 0.291[7.39] PACKAGE WEIGHT 0.85gms 0.300[7.62] 28 0.026[0.66] 0.032[0.81] SEATING PLANE 0.092[2.33] 0.105[2.67] 0.004[0.10] 0.004[0.10] * 0.0118[0.30] CY7B923 CY7B933 DIMENSIONS IN INCHES MIN. MAX. 0.013 0.021 0.390 0.430 0.020 MIN. 0.090 0.120 0.165 51-85001-*A 0.180 MIN. MAX. PART # S28.3 STANDARD PKG. ...
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... Document History Page Document Title: CY7B923/CY7B933 HOTLink Document Number: 38-02017 Issue Orig. of REV ECN NO. Date Change ** 105855 03/28/01 SZV *A 112164 03/25/02 REV *B 114562 03/27/02 BSS *C 125525 04/01/03 OOR *D 132104 12/22/03 KKV *E 393422 See ECN PCX Document #: 38-02017 Rev. *E Transmitter/Receiver Description of Change Changed from Spec number: 38-00189 to 38-02017 Changed OUTA± ...