W29EE011-90 Winbond Electronics, W29EE011-90 Datasheet

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W29EE011-90

Manufacturer Part Number
W29EE011-90
Description
Manufacturer
Winbond Electronics
Datasheet

Specifications of W29EE011-90

Density
1Mb
Access Time (max)
90ns
Interface Type
Parallel
Boot Type
Not Required
Address Bus
17b
Operating Supply Voltage (typ)
5V
Operating Temp Range
0C to 70C
Package Type
PDIP
Program/erase Volt (typ)
5V
Sync/async
Asynchronous
Operating Temperature Classification
Commercial
Operating Supply Voltage (min)
4.5V
Operating Supply Voltage (max)
5.5V
Word Size
8b
Number Of Words
128K
Supply Current
50mA
Mounting
Through Hole
Pin Count
32
Lead Free Status / Rohs Status
Not Compliant

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Company
Part Number
Manufacturer
Quantity
Price
Part Number:
W29EE011-90
Manufacturer:
WINBOND
Quantity:
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Part Number:
W29EE011-90
Quantity:
9
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W29EE011-90
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WINBOND/华邦
Quantity:
20 000
Part Number:
W29EE011-90Z
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WINBOND
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Part Number:
W29EE011-90Z
Manufacturer:
Winbond
Quantity:
5 596
Table of Contents-
1.
2.
3.
4.
5.
6.
7.
8.
9.
GENERAL DESCRIPTION ......................................................................................................... 3
FEATURES ................................................................................................................................. 3
PIN CONFIGURATIONS............................................................................................................. 4
BLOCK DIAGRAM ...................................................................................................................... 5
PIN DESCRIPTION..................................................................................................................... 5
FUNCTIONAL DESCRIPTION.................................................................................................... 6
6.1
6.2
6.3
6.4
6.5
6.6
6.7
6.8
TABLE OF OPERATING MODES .............................................................................................. 8
7.1
7.2
7.3
7.4
ELECTRICAL CHARACTERISTICS......................................................................................... 12
8.1
8.2
8.3
TIMING WAVEFORMS ............................................................................................................. 16
9.1
9.2
9.3
Read Mode ..................................................................................................................... 6
Page Write Mode ............................................................................................................ 6
Software-protected Data Write ....................................................................................... 6
Hardware Data Protection .............................................................................................. 7
Data Polling (DQ7)-Write Status Detection .................................................................... 7
Toggle Bit (DQ6)-Write Status Detection........................................................................ 7
5-Volt-only Software Chip Erase..................................................................................... 7
Product Identification ...................................................................................................... 7
Operating Mode Selection .............................................................................................. 8
Command Codes for Software Data Protection ............................................................. 8
7.2.1
Command Codes for Software Chip Erase .................................................................. 10
7.3.1
Command Codes for Product Identification.................................................................. 11
7.4.1
Absolute Maximum Ratings .......................................................................................... 12
DC Characteristics ........................................................................................................ 12
8.2.1
8.2.2
8.2.3
AC Characteristics ........................................................................................................ 13
8.3.1
8.3.2
8.3.3
8.3.4
8.3.5
Read Cycle Timing Diagram......................................................................................... 16
#WE Controlled Write Cycle Timing Diagram............................................................... 16
#CE Controlled Write Cycle Timing Diagram ............................................................... 17
Software Data Protection Acquisition Flow ...............................................................9
Software Chip Erase Acquisition Flow....................................................................10
Software Product Identification Acquisition Flow ....................................................11
Operating Characteristics .......................................................................................12
Power-up Timing ....................................................................................................12
Capacitance............................................................................................................13
AC Test Conditions.................................................................................................13
AC Test Load and Waveforms................................................................................13
Read Cycle Timing Parameters..............................................................................14
Byte/Page-write Cycle Timing Parameters .............................................................14
Data Polling and Toggle Bit Timing Parameters .....................................................15
128K × 8 CMOS FLASH MEMORY
- 1 -
Publication Release Date: April 11, 2006
W29EE011
Revision A18

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W29EE011-90 Summary of contents

Page 1

... Data Polling and Toggle Bit Timing Parameters .....................................................15 9. TIMING WAVEFORMS ............................................................................................................. 16 9.1 Read Cycle Timing Diagram......................................................................................... 16 9.2 #WE Controlled Write Cycle Timing Diagram............................................................... 16 9.3 #CE Controlled Write Cycle Timing Diagram ............................................................... 17 128K × 8 CMOS FLASH MEMORY Publication Release Date: April 11, 2006 - 1 - W29EE011 Revision A18 ...

Page 2

... Reset Software Data Protection Timing Diagram......................................................... 19 9.9 5 Volt-only Software Chip Erase Timing Diagram ........................................................ 20 10. ORDERING INFORMATION..................................................................................................... 21 11. HOW TO READ THE TOP MARKING...................................................................................... 22 12. PACKAGE DIMENSIONS ......................................................................................................... 23 12.1 32-pin P-DIP ................................................................................................................. 23 12.2 32-pin PLCC ................................................................................................................. 23 12.3 32-pin TSOP ( mm)............................................................................................. 24 12.4 32-pin STSOP ( mm) .......................................................................................... 24 13. VERSION HISTORY ................................................................................................................. W29EE011 ...

Page 3

... GENERAL DESCRIPTION The W29EE011 is a 1-megabit, 5-volt only CMOS flash memory organized as 128K × 8 bits. The device can be programmed and erased in-system with a standard 5V power supply. A 12-volt V not required. The unique cell architecture of the W29EE011 results in fast program/erase operations with extremely low current consumption (compared to other comparable 5-volt flash memory products). ...

Page 4

... DQ1 15 18 DQ2 16 17 GND 32-pin PLCC DQ0 32-pin TSOP - 4 - W29EE011 V DD #WE NC A14 A13 A8 A9 A11 #OE A10 #CE DQ7 DQ6 DQ5 DQ4 DQ3 A14 A13 A8 A9 A11 #OE A10 #CE DQ7 32 #OE A10 31 30 #CE DQ7 29 DQ6 28 DQ5 27 DQ4 26 DQ3 25 GND 24 DQ2 23 DQ1 22 DQ0 ...

Page 5

... SYMBOL A0 − A16 DQ0 − DQ7 #CE #OE # GND NC DD OUTPUT CONTROL BUFFER CORE . DECODER ARRAY . Address Inputs Data Inputs/Outputs Chip Enable Output Enable Write Enable Power Supply Ground No Connection - 5 - W29EE011 DQ0 . . DQ7 PIN NAME Publication Release Date: April 11, 2006 Revision A18 ...

Page 6

... Read Mode The read operation of the W29EE011 is controlled by #CE and #OE, both of which have to be low for the host to obtain data from the outputs. #CE is used for device selection. When #CE is high, the chip is de-selected and only standby power will be consumed. #OE is the output control and is used to gate data from the output pins ...

Page 7

... Hardware Data Protection The integrity of the data stored in the W29EE011 is also hardware protected in the following ways: (1) Noise/Glitch Protection: A #WE pulse of less than duration will not initiate a write cycle. (2) V Power Up/Down Detection: The programming and read operation are inhibited when V DD less than 3 ...

Page 8

... − A16 = ENABLE PROTECTION ADDRESS DATA 5555H AAH 2AAAH 55H 5555H A0H - - - - - - - 8 - W29EE011 = 12V HH DQ. Dout IN Din IN High Z High Z/D OUT High Z/D OUT High Manufacturer Code (Hex) Device Code ; IL C1 (Hex) TO DISABLE PROTECTION ADDRESS 5555H 2AAAH 5555H 5555H 2AAAH 5555H ...

Page 9

... Load data A0 to address 5555 address 5555 Sequentially load Load data 128 bytes of page data address 5555 Pause 10 mS address 2AAA Exit Load data 20 address 5555 Pause W29EE011 to Load data 55 to Load data Load data Exit Publication Release Date: April 11, 2006 Revision A18 ...

Page 10

... Load data AA to address 5555 Load data 55 to address 2AAA Load data 80 to address 5555 Load data AA to address 5555 Load data 55 to address 2AAA Load data 10 to address 5555 Pause 50 mS Exit - 10 - W29EE011 DATA AAH 55H 80H AAH 55H 10H ...

Page 11

... AAH 2AAAH 55H 5555H 60H Pause 10 µS Product Identification Mode(2, 3) Read address = 0 data = DA Read address = 1 data = C1 µ device code is read for W29EE011 SOFTWARE PRODUCT IDENTIFICATION EXIT ADDRESS DATA 5555H AAH 2AAAH 55H 5555H F0H - - - - - - Pause 10 µS Product Identification Exit(1) ...

Page 12

... MHz # all I/Os open IH Other inputs = # -0.3V, all I/Os open DD Other inputs = V -0.3V/GND GND GND 2 -0 SYMBOL T .READ PU T .WRITE W29EE011 RATING UNIT -0.5 to +7.0 V ° +70 °C -65 to +150 - -0.5 to 12.5 V LIMITS UNIT MIN. TYP. MAX µ 100 µA - ...

Page 13

... Jig and Scope) CONDITIONS I/O I < 1.5V/1.5V 1 TTL Gate and for 70 nS and 100 pF for others. L +5V 1.8K ohm D OUT 1.3K ohm Input Output 3V 1.5V 1.5V 0V Test Point Test Point - 13 - W29EE011 MAX. UNIT CONDITIONS Publication Release Date: April 11, 2006 Revision A18 ...

Page 14

... High Width Data Setup Time Data Hold Time Byte Load Cycle Time Byte Load Cycle Time-out Note: All AC timing signals observe the following guidelines for determining setup and hold times: (a) High level signal's reference level 70° W29EE011-90 SYMBOL MIN. MAX. TRC 90 - TCE - ...

Page 15

... Data Polling and Toggle Bit Timing Parameters PARAMETER #OE to Data Polling Output Delay #CE to Data Polling Output Delay #OE to Toggle Bit Output Delay #CE to Toggle Bit Output Delay W29EE011-90 SYM. MIN. MAX. TOEP - 45 TCEP - 90 TOET - 45 TCET - 90 Publication Release Date: April 11, 2006 ...

Page 16

... TIMING WAVEFORMS 9.1 Read Cycle Timing Diagram Address A16-0 #CE # #WE High-Z DQ7-0 9.2 #WE Controlled Write Cycle Timing Diagram T Address A16-0 #CE #OE #WE DQ7 OLZ T CLZ Data Valid OES Data Valid - 16 - W29EE011 T OHZ CHZ High-Z Data Valid BLCO OEH T WPH T DH Internal write starts ...

Page 17

... Page Write Cycle Timing Diagram Address A16-0 DQ7-0 #CE #OE # OES T DS Data Valid T BLC T WPH T WP Byte 0 Byte 1 Byte W29EE011 T BLCO CPH T OEH T DH Internal Write Starts BLCO Byte N-1 Byte N Internal Write Start Publication Release Date: April 11, 2006 Revision A18 ...

Page 18

... Polling Timing Diagram Address A16-0 #WE #CE #OE DQ7-0 9.6 Toggle Bit Timing Diagram Address A16-0 #WE #CE #OE DQ6 T CEP T OEH T OEP OEH W29EE011 T OES OES ...

Page 19

... SW2 Byte 0 Six-byte sequence for resetting software data protection mode 5555 5555 2AAA BLC T WPH SW2 SW3 SW1 - 19 - W29EE011 BLCO Byte N Byte N-1 (last byte) Internal write starts T WC 2AAA 5555 BLCO SW4 SW5 Internal programming starts Publication Release Date: April 11, 2006 ...

Page 20

... Volt-only Software Chip Erase Timing Diagram Address A16-0 5555 DQ7-0 #CE # #WE SW0 Six-byte code for 5V-only software chip erase 5555 5555 2AAA 2AAA BLC T WPH SW2 SW3 SW1 - 20 - W29EE011 T WC 5555 BLCO SW4 SW5 Internal programming starts ...

Page 21

... W29EE011-90B 90 W29EE011-15B 150 W29EE011T90B 90 W29EE011T15B 150 W29EE011Q90B 90 W29EE011Q15B 150 W29EE011P90B 90 W29EE011P15B 150 W29EE011-90N 90 W29EE011-15N 150 W29EE011P90N 90 W29EE011P15N 150 W29EE011P90Z 90 W29EE011P15Z 150 W29EE011Q90Z 90 Notes: 1. Winbond reserves the right to make changes to its products without prior notice. 2. Purchasers are responsible for performing appropriate quality assurance testing on products intended for use in applications where personal injury might occur as a consequence of product failure Hardware SID Read column with SID read function ...

Page 22

... HOW TO READ THE TOP MARKING Example: The top marking of 32L-PLCC W29EE011P15N W29EE011P15N 2138977A-A12 149OBRA st 1 line: winbond logo nd 2 line: the part number: W29EE011P15N rd 3 line: the lot number th 4 line: the tracking code: 149 149: Packages made in ’01, week 49 O: Assembly house ID: A means ASE, O means OSE, ...etc. ...

Page 23

... L θ Seating Plane Base Plane 1 Seating Plane W29EE011 Dimension in inches Dimension in mm Symbol Min. Nom. Max. Min. Nom. Max. A 0.210 5.33 A 0.010 0. 0.150 0.155 0.160 3.81 3.94 4. 0.016 0.018 0.022 0.41 0.46 0.56 B 0.050 1.22 1.27 1.37 0.048 0.054 1 c 0.010 ...

Page 24

... Package Dimensions, continued 12.3 32-pin TSOP ( mm 0.10(0.004) b θ 12.4 32-pin STSOP ( mm θ W29EE011 Dimension in Inches Dimension in mm Symbol Min. Nom. Min. Nom. Max. Max 1.20 0.047 0.002 0.006 0.05 0. 0.95 0.037 0.041 1.00 1.05 0.039 2 b 0.007 0.008 0.17 0.20 0.23 0.009 c 0 ...

Page 25

... Correct Part No. in Ordering Information Modify V Power Up/Down Detection in Hardware DD 4 Data Protection 18 Add HOW TO READ THE TOP MARKING 1, 17, 20 Rename TSOP ( mm) as STSOP ( mm Add in Lead-free 32-pin PLCC package 23 Add important notice 21 Add W29EE011Q90Z package - 25 - W29EE011 DESCRIPTION Publication Release Date: April 11, 2006 Revision A18 ...

Page 26

... FAX: 1-408-5441798 Winbond Electronics Corporation Japan 7F Daini-ueno BLDG, 3-7-18 Shinyokohama Kohoku-ku, Yokohama, 222-0033 TEL: 81-45-4781881 FAX: 81-45-4781800 - 26 - W29EE011 Winbond Electronics (Shanghai) Ltd. 27F, 2299 Yan An W. Rd. Shanghai, 200336 China TEL: 86-21-62365999 FAX: 86-21-62365998 Winbond Electronics (H.K.) Ltd. Unit 9-15, 22F, Millennium City, No ...

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