HEF40098BP NXP Semiconductors, HEF40098BP Datasheet

HEF40098BP

Manufacturer Part Number
HEF40098BP
Description
Manufacturer
NXP Semiconductors
Datasheet

Specifications of HEF40098BP

Logic Family
4000
Logical Function
Buffer/Line Driver
Number Of Elements
2
Number Of Channels
6
Number Of Inputs
6
Number Of Outputs
6
Operating Supply Voltage (typ)
3.3/5/9/12V
Package Type
PDIP
Output Type
3-State
Polarity
Inverting
Propagation Delay Time
185ns
High Level Output Current
-12.5mA
Low Level Output Current
24mA
Operating Supply Voltage (max)
15V
Operating Supply Voltage (min)
3V
Quiescent Current
16uA
Technology
CMOS
Pin Count
16
Mounting
Through Hole
Operating Temp Range
-40C to 85C
Operating Temperature Classification
Industrial
Lead Free Status / Rohs Status
Compliant

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
HEF40098BP
Manufacturer:
ST
Quantity:
1 156
Part Number:
HEF40098BP
Manufacturer:
N/A
Quantity:
20 000
1. General description
2. Features
3. Applications
4. Ordering information
Table 1.
All types operate from 40 C to +85 C
Type number
HEF40098BP
HEF40098BT
Ordering information
Package
Name
DIP16
SO16
The HEF40098B is a hex inverting buffer with 3-state outputs. The 3-state outputs are
controlled by two active LOW enable inputs (1OE and 2OE). A HIGH on 1OE causes four
of the six active LOW buffer elements (1Y0 to 1Y3) to assume a high-impedance or
OFF-state regardless of the other input conditions and a HIGH on 2OE causes the
outputs of the remaining two buffer elements (2Y0 and 2Y1) to assume a high-impedance
or OFF-state regardless of the other input conditions.
It operates over a recommended V
(usually ground). Unused inputs must be connected to V
also suitable for use over the full industrial ( 40 C to +85 C) temperature range.
I
I
I
I
I
I
HEF40098B
Hex inverting buffer; 3-state
Rev. 06 — 24 June 2009
Fully static operation
5 V, 10 V, and 15 V parametric ratings
Standardized symmetrical output characteristics
Operates across the full industrial temperature range 40 C to +85 C
Complies with JEDEC standard JESD 13-B
Industrial
Description
plastic dual in-line package; 16-leads (300 mil)
plastic small outline package; 16 leads; body width 3.9 mm
DD
power supply range of 3 V to 15 V referenced to V
DD
, V
SS
, or another input. It is
Product data sheet
Version
SOT38-4
SOT109-1
SS

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HEF40098BP Summary of contents

Page 1

... Industrial 4. Ordering information Table 1. Ordering information All types operate from +85 C Type number Package Name Description HEF40098BP DIP16 plastic dual in-line package; 16-leads (300 mil) HEF40098BT SO16 plastic small outline package; 16 leads; body width 3.9 mm power supply range referenced another input ...

Page 2

... NXP Semiconductors 5. Functional diagram 2 1A0 4 1A1 6 1A2 10 1A3 1 1OE 14 2A0 12 2A1 15 2OE Fig 1. Functional diagram 6. Pinning information 6.1 Pinning Fig 3. Pin configuration HEF40098B_6 Product data sheet 1Y0 3 1Y1 5 1Y2 7 1Y3 9 2Y0 13 2Y1 11 001aae553 Fig 2. HEF40098B 1OE 1 2 1A0 1Y0 3 1A1 ...

Page 3

... NXP Semiconductors 6.2 Pin description Table 2. Pin description Symbol Pin 1OE 1 1A0, 1A1, 1A2, 1A3 1Y0, 1Y1, 1Y2, 1Y3 2Y0, 2Y1 13, 11 2A0, 2A1 14, 12 2OE Functional description [1] Table 3. Function table Inputs nAn [ HIGH voltage level LOW voltage level don’t care high-impedance OFF state. ...

Page 4

... NXP Semiconductors 9. Recommended operating conditions Table 5. Recommended operating conditions Symbol Parameter V supply voltage DD V input voltage I T ambient temperature amb t/ V input transition rise and fall rate 10. Static characteristics Table 6. Static characteristics unless otherwise specified Symbol Parameter V HIGH-level input voltage ...

Page 5

... NXP Semiconductors 11. Dynamic characteristics Table 7. Dynamic characteristics for test circuit see SS amb Symbol Parameter t HIGH to LOW PHL propagation delay t LOW to HIGH PLH propagation delay t HIGH to LOW output THL transition time t LOW to HIGH output TLH transition time t HiGH to OFF-state PHZ propagation delay ...

Page 6

... NXP Semiconductors 12. AC waveforms Measurement points are given in Fig 4. Input (nAn) to output (nYn) propagation delays nOE input nYn output LOW-to-OFF OFF-to-LOW nYn output HIGH-to-OFF OFF-to-HIGH Measurement points are given in Fig 5. 3-state enable and disable times Table 9. Measurement points Supply voltage Input ...

Page 7

... NXP Semiconductors Test data is given in Table Definitions for test circuit Load resistance Load capacitance including jig and probe capacitance Termination resistance should be equal to output impedance External voltage for measuring switching times. EXT Fig 6. Test circuitry for switching times Table 10. Test data ...

Page 8

... NXP Semiconductors 13. Package outline DIP16: plastic dual in-line package; 16 leads (300 mil pin 1 index 1 DIMENSIONS (inch dimensions are derived from the original mm dimensions UNIT max. min. max. mm 4.2 0.51 3.2 inches 0.17 0.02 0.13 Note 1. Plastic or metal protrusions of 0.25 mm (0.01 inch) maximum per side are not included. ...

Page 9

... NXP Semiconductors SO16: plastic small outline package; 16 leads; body width 3 pin 1 index 1 DIMENSIONS (inch dimensions are derived from the original mm dimensions) A UNIT max. 0.25 1.45 mm 1.75 0.25 0.10 1.25 0.010 0.057 inches 0.069 0.01 0.004 0.049 Note 1. Plastic or metal protrusions of 0.15 mm (0.006 inch) maximum per side are not included. ...

Page 10

... NXP Semiconductors 14. Revision history Table 11. Revision history Document ID Release date HEF40098B_6 20090624 • Modifications: Title changed. • Section 2 • Section 8 “Limiting • Applications section removed. • Section 15 “Legal _5 HEF40098B 20081031 HEF40098B_4 20080731 HEF40098B_CNV_3 19950101 HEF40098B_CNV_2 19950101 HEF40098B_6 Product data sheet ...

Page 11

... Right to make changes — NXP Semiconductors reserves the right to make changes to information published in this document, including without limitation specifications and product descriptions, at any time and without notice ...

Page 12

... NXP Semiconductors 17. Contents 1 General description . . . . . . . . . . . . . . . . . . . . . . 1 2 Features . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1 3 Applications . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1 4 Ordering information . . . . . . . . . . . . . . . . . . . . . 1 5 Functional diagram . . . . . . . . . . . . . . . . . . . . . . 2 6 Pinning information . . . . . . . . . . . . . . . . . . . . . . 2 6.1 Pinning . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2 6.2 Pin description . . . . . . . . . . . . . . . . . . . . . . . . . 3 7 Functional description . . . . . . . . . . . . . . . . . . . 3 8 Limiting values Recommended operating conditions Static characteristics Dynamic characteristics . . . . . . . . . . . . . . . . . . waveforms . . . . . . . . . . . . . . . . . . . . . . . . . . 6 13 Package outline . . . . . . . . . . . . . . . . . . . . . . . . . 8 14 Revision history ...

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