TDA4856 NXP Semiconductors, TDA4856 Datasheet
TDA4856
Specifications of TDA4856
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TDA4856 Summary of contents
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... DATA SHEET TDA4856 2 I C-bus autosync deflection controller for PC monitors Product specification Supersedes data of 1999 Jul 13 INTEGRATED CIRCUITS 2003 Sep 30 ...
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... C-bus controllable output for horizontal and vertical parabolas Vertical parabola is independent of frequency and tracks with vertical adjustments Horizontal parabola independent of frequency Adjustable pre-correction of delay in focus output stage. and f by external max 2 Product specification TDA4856 2 C-bus controllable vertical sawtooth and 2 C-bus. ...
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... Philips Semiconductors 2 I C-bus autosync deflection controller for PC monitors GENERAL DESCRIPTION The TDA4856 is a high performance and efficient solution for autosync monitors. All functions are controllable by the 2 I C-bus. The TDA4856 provides synchronization processing, horizontal and vertical synchronization with full autosync capability and very short settling times after mode changes ...
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... HORIZONTAL AND HORIZONTAL PINCUSHION AND AGC VERTICAL SIZE HORIZONTAL CORNER HORIZONTAL TRAPEZIUM HORIZONTAL SIZE VERTICAL POSITION VERTICAL SIZE AND VERTICAL OVERSCAN PROTECTION AND SOFT START TDA4856 2 I C-BUS REGISTERS X-RAY PROTECTION FREQUENCY DETECTOR PLL2, PARALLELOGRAM, HORIZONTAL PIN UNBALANCE AND OSCILLATOR SOFT START ...
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... HREF 28 reference current input for horizontal oscillator HCAP 29 external capacitor for horizontal oscillator HPLL2 30 external filter for PLL2/soft start HSMOD 31 input for EHT compensation (via horizontal size) FOCUS 32 output for horizontal and vertical focus 2003 Sep 30 DESCRIPTION 5 Product specification TDA4856 ...
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... No horizontal flyback pulses at HFLB (pin 1) X-ray protection is activated Supply voltage Via I C-bus control, horizontal unlock blanking can be switched off by control bit BLKDIS while vertical blanking is maintained. 6 Product specification TDA4856 2 C-bus control, 2 C-bus control, two 2 C-bus) (pin 10) is low (see Fig.22). CC ...
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... R can be calculated with HREF HBUFpar 78 kHz k = ----------------------------------------------------------------- 0.0012 f kHz min min 78 kHz k = ------------------------------------------------------------------- - 0.0012 f kHz max max is calculated as the value of R HBUFpar in parallel. HBUF Product specification TDA4856 have to be max for f min 2. 726 HREF ...
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... mA. To protect the line deflection transistor, the output stage is disabled (floating) for low supply voltage at V The duty cycle of line drive pulses is slightly dependent on the actual horizontal frequency. This ensures optimum drive conditions over the whole frequency range. 8 Product specification TDA4856 (see Fig.26). CC ...
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... VOUT1 and VOUT2; VSMOD does not affect the EW waveforms, vertical focus, pin unbalance and parallelogram corrections. Product specification TDA4856 and 10% fr( 19% ...
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... HREF where: I HSMOD V 0.69 = ------------------- - HEHT 120 A V HSIZE f HSIZE ( ) 1 = – ---------------- - 14 HSIZE g HSIZE,HSMOD ( ) = 1 – ------------------------------------------------------------------------ - I HREF ----------------------------------------- - HREF I HREF kHz 10 Product specification TDA4856 , HSMOD in the EWDRV output caused by I will be HSMOD as shown in the equation V f(HSIZE) HEHT g HSIZE,HSMOD ( ) V HSIZE + V 1 – ---------------- - HEHT 14.4 V 14.4 V ...
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... VFOCUS. FOCUS (pin 32) is designed as a voltage output for the superimposed vertical and horizontal parabolas. B+ control function block The B+ control function block of the TDA4856 consists of an Operational Transconductance Amplifier (OTA), a voltage comparator, a flip-flop and a discharge circuit (see Fig.25). This configuration allows easy applications for different B+ control concepts. See also Application Note AN96052: “ ...
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... Sep 30 Supply voltage stabilizer, references, start-up procedures and protection functions The TDA4856 provides an internal supply voltage stabilizer for excellent stabilization of all internal references. An internal gap reference, especially designed for low-noise, is the reference for the internal horizontal and vertical supply voltages ...
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... The acknowledge will only be given on the data if the IC is active. Due to this behaviour the start-up of the TDA4856 is defined as follows: the first data that is transferred to the deflection controller must be sent to the control register with subaddress 1AH. Any other subaddress will not lead to an acknowledge ...
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... Note 1. Tests are performed with application reference board. Tests with other boards will have different results. 2003 Sep 30 PARAMETER PARAMETER CONDITIONS note 1 note 1 14 Product specification TDA4856 CONDITIONS MIN. MAX. 0.5 +14.2 0.5 +6.0 0.5 +6.5 0.5 +8.0 ...
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... MIN. TYP. 1.7 1 VIDEO NEGATIVE SYNC POLARITY 300 90 120 1.1 1.28 1.7 2.4 clamp(HSYNC) 0 3.9 5.7 2.5 3.8 1.7 1.2 1.4 < 5.5 V TDA4856 MAX. UNIT V 1.6 V 500 ns 500 ns s 200 150 mV 1 1500 6 ...
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... CLAMP = 1; measured CLBL notes 1 and 2 1.7 control bit VBLK = 0 220 control bit VBLK = 1 305 0.59 CLBL 2.4 16 Product specification TDA4856 TYP. MAX. UNIT 400 s 1.8 ms 0.7 0.8 s 4.75 5. mV/K 50 ns/V 130 ns 1 ...
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... PLL1 locked = 1 V HUNLOCK case of HUNLOCK unlocked PLL1 and/or protection active notes 4 and 5 locked mode; level 1 locked mode; level 2 minimum horizontal frequency maximum horizontal frequency 17 Product specification TDA4856 TYP. MAX. UNIT 31.45 32.39 kHz 3 +100 10 /K 130 kHz 2.55 2.68 ...
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... MOD = 0 register HMOIRE = 63; control bit MOD = 0 control bit MOD = 1 maximum advance; 36 register HPINBAL = 32; register HPARAL = 32 minimum advance; register HPINBAL = 32; register HPARAL = 32 V < 3.7 V HPLL2 V < 3.7 V HPLL2 18 Product specification TDA4856 TYP. MAX. UNIT 1.2 % 1.2 % 0.02 % 1 ...
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... V R XSEL pin 9 connected XSEL no reset via I 19 Product specification MIN. TYP. 5.5 0.75 2 45.5 48 6.22 6.39 500 set control bit SOFTST via I via switch off V , then re-apply via CC via C-bus 56 TDA4856 MAX. UNIT 0 C-bus 130 k ...
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... VSIZE = 127; register VGAIN = 63; bit VOVSCN = 0; note 8 register VSIZE = 0; register VGAIN = 63; bit VOVSCN = 1; note 8 register VSIZE = 127; register VGAIN = 63; bit VOVSCN = 1; note i(VSMOD 120 A i(VSMOD) VSMOD = 0 VSMOD = 7% 20 Product specification TDA4856 MIN. TYP. MAX. UNIT ) fr( 43.3 Hz 160 Hz 3.0 V 220 260 300 s ...
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... MOD = 0 2 register VMOIRE = 63; control bit MOD = 0 control bit MOD = VOUT VOUT1 nominal settings; note 8 control bit VOVSCN = 1 nominal settings; note 8 nominal settings; note 8 21 Product specification TDA4856 MIN. TYP. MAX 0.25 11.5 11.5 0. 0.7 1.85 1.40 ...
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... HTRAP = 0; note 8 register HTRAP = 32; note 8 register HSIZE = 255; note 8 register HSIZE = 0; note note 8 i(HSMOD 120 A; note 8 i(HSMOD 0.02 V HEHT(EWDRV 0.69 V HEHT(EWDRV) 300 i(HSMOD i(HSMOD (RMS) 22 Product specification TDA4856 TYP. MAX. UNIT 1.2 1. 600 10 /K 0.04 V 1.42 V 0 0 ...
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... HPINBAL = 0; note 8 register HPINBAL = 63; note 8 register HPINBAL = 32; note 8 V 1.9 V o(ASCOR) V 1.9 V o(ASCOR) register HFOCAD = 0 register HFOCAD = 1 register HFOCAD = 2 register HFOCAD = 3 1.9 operation without pre-correction 23 Product specification TDA4856 TYP. MAX. UNIT 80 kHz 0.72 V 1. 0.825 V 0.825 V 0. ...
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... BDRV PIN note BDRV I < o(BDRV) measured HDRV BDRV 24 Product specification MIN. TYP. 0.06 3.3 0.02 1.1 6.15 6.4 6.65 1.0 1.3 1.6 1 5.25 2.37 2.5 2.58 0.5 5.0 5.3 5.6 500 300 250 500 = 3 V TDA4856 MAX. UNIT ...
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... V VOLTAGE 25 Product specification MIN. TYP. 0.85 1.0 4.5 6.0 1.2 1.3 2 9.2 68 < PLL2 < 13 8.2 8.6 2.5 3.5 7.9 8.3 7.7 8.1 4.6 4.0 3.2 3.2 1.8 1 TDA4856 MAX. UNIT 1.15 V 7 9.0 V 4.0 V 8 ...
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... V BOP 12. Open-loop gain is ------------- - with no resistive load and C V BIN 13. The recommended value for the pull-up resistor at BDRV (pin 2003 Sep 30 )”. BOP 26 Product specification . The EWDRV low level of 1.2 V remains fixed. HREF = 10 nF [from BOP (pin 3) to GND]. TDA4856 ...
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... VGAIN = 63, control bit VOVSCN = 0. VGAIN = ------- - Fig.4 Adjustment of vertical size (VGAIN). MBG592 handbook, halfpage I VOUT1 I VOUT2 ( ( the maximum amplitude setting at register VSIZE = 127 1 and VLIN = 0 VLIN = --------------------- - Fig.6 Adjustment of vertical linearity (vertical S-correction). 27 Product specification TDA4856 MGS274 100 ( – 100 ( MBG594 t ...
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... Fig.7 Adjustment of vertical linearity balance. handbook, halfpage V EWDRV Fig.9 Influence of corner correction at pin EWDRV. 2003 Sep 30 MGM068 handbook, halfpage V EWDRV ( Fig.8 Adjustment of parabola amplitude at pin EWDRV. handbook, halfpage MGM070 V EWDRV V HCOR(EWDRV) t Fig.10 Influence of trapezium at pin EWDRV. 28 Product specification TDA4856 MGM069 V HPIN(EWDRV) t MGM071 V HTRAP(EWDRV) t ...
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... V EWDRV Fig.11 Influence of HSIZE and EHT compensation at pin EWDRV. handbook, halfpage V ASCOR V c(ASCOR) Fig.13 Adjustment of pin balance at pin ASCOR. 2003 Sep 30 MGM072 handbook, halfpage V ASCOR V c(ASCOR) V HSIZE(EWDRV) V HEHT(EWDRV) t Fig.12 Adjustment of parallelogram at pin ASCOR. MGM074 V HPINBAL(ASCOR Product specification TDA4856 MGM073 V HPARAL(ASCOR) t ...
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... VOUT1 (pin 13) and VOUT2 (pin 12) EW drive waveform at EWDRV (pin 11) 2003 Sep 30 4.0 V automatic trigger level 3.8 V synchronized trigger level 1.4 V inhibited I VOUT1 I VOUT2 DC shift 3.6 V maximum Fig.14 Pulse diagram for vertical part. 30 Product specification TDA4856 7.0 V maximum low-level 1.2 V fixed MGM075 ...
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... HFLB (pin 1) PLL2 control current at HPLL2 (pin 30) line drive pulse at HDRV (pin 8) horizontal focus parabola at FOCUS (pin 32) 2003 Sep PLL2 control range 45 to 52% of line period Fig.15 Pulse diagram for horizontal part. 31 Product specification TDA4856 - vertical blanking level – MGS275 ...
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... CLBL (pin 16) b. Generation of video clamping pulses during vertical sync with serration pulses. Fig.17 Pulse diagrams for composite sync applications. 2003 Sep 110 time of HDRV as a function of horizontal frequency. OFF 32 Product specification TDA4856 MGM077 130 f H (kHz) MGC947 MBG596 ...
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... To avoid this kind of interference, at least the adjustment of some critical geometry parameters should be synchronized with the vertical flyback. The TDA4856 offers a feature to 2 synchronize any I C-bus adjustment with the internal vertical flyback pulse ...
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... Bits STDBY and SOFTST can be reset by the internal protection circuit. 2003 Sep 30 FUNCTION 34 REGISTER ASSIGNMENT SAD1 SAD2 (HEX) (HEX Product specification TDA4856 # # # # # # # # # # # # # # # # # # # # # # # # # # # # # # # # # # # # ...
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Acrobat reader. white to force landscape pages to be ... 2 List of I C-bus controlled functions 2 I C-bus data can be transmitted ...
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Acrobat reader. white to force landscape pages to be ... SAD1 FUNCTION NAME BITS (HEX) Moire cancellation via VMOIRE 6 00 vertical position Moire ...
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... Setting control bit SOFTST = 0 is the only way (except power-down via pin V yes Soft down sequence: (1) L4 See L4 of Fig.19 for starting the soft down sequence. MGL791 37 Product specification < 8.6 V register SOFTST cannot be set C-bus 2 C-bus data transfer as follows leave the operating mode. CC TDA4856 ...
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... Set control bit STDBY = 1 Driver outputs are floating (same as protection mode) Supply current Only the I C-bus section and protection circuits are operative Contents of all registers are lost, except the value of bit STDBY and bit SOFTST See L2 of Fig.18 for continuation. Product specification TDA4856 ...
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... C-bus transmission chip address subaddress S 8CH A 0XH A yes acknowledge was given on data C-bus transmission chip address subaddress S 8CH A 0XH A yes acknowledge was given on data? no Standby mode Fig.21 Possible standby mode detection. Product specification TDA4856 data XXH A P data XXH A P MGS276 ...
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... PLL2 soft down sequence is triggered 2 8 data accepted from I C-bus video clamping pulse and vertical outputs disabled 3 Shut-down sequence. 40 MGS277 continuous blanking off (1) PLL2 soft start/soft down enabled 2 C-bus enabled if control bit STDBY = 0 time MGS278 (2) continuous blanking disappears time Product specification TDA4856 ...
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... HDRV/HFLB protection disabled 4.0 V BDRV duty cycle begins to decrease 2.8 V BDRV floating HDRV duty cycle begins to decrease 1 PLL2 soft down sequence for V < 8 Product specification TDA4856 MGS279 continuous blanking off PLL2 enabled frequency detector enabled HDRV/HFLB protection enabled time > 8 MGS280 (1) (1) ...
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... Philips Semiconductors 2 I C-bus autosync deflection controller for PC monitors handbook, full pagewidth V XRAY V HUNLOCK BDRV duty cycle HDRV duty cycle Fig.24 Activation of soft down sequence via pin XRAY. 2003 Sep 30 X-ray latch triggered 42 Product specification TDA4856 floating floating MGS281 ...
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... V BIN V BOP 4 V BSENS BOP Feedback mode application. Fig.25 Application and timing for feedback mode. 43 Product specification ( BDRV S Q TR1 R Q INVERTING BUFFER DISCHARGE R5 t off(min) V RESTART(BSENS) V STOP(BSENS) MBG600 c. Waveforms for fault condition. TDA4856 L D2 HORIZONTAL OUTPUT STAGE R4 MGM080 ...
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... Forward mode application. V BOP Fig.26 Application and timing for feed forward mode ( INVERTING HORIZONTAL BUFFER OUTPUT Q STAGE Q EHT transformer V BDRV 3 TR1 R3 t off (discharge time of C BSENS ) c. Waveforms for fault condition. Product specification TDA4856 horizontal flyback pulse MOSFET MGM081 V RESTART(BSENS) V STOP(BSENS) MBG602 ...
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... Line flyback pulse at HFLB (pin 1). (2) Horizontal focus parabola at FOCUS (pin 32). 2003 Sep 30 (1) I VOUT ( A) 415 ( 415 I I – ------------- - I 0 Fig.27 Definition of vertical linearity error. (1) (2) t precor = 450 ns t precor = 300 ns Fig.28 Definition of H-focus pre-correction. 45 MBG551 (3) ( VCAP MGS282 Product specification TDA4856 ...
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... BDRV line in parallel to ground SMD For optimum performance of the TDA4856 the ground paths must be routed as shown. Only one connection to other grounds on the PCB is allowed. Note: The tracks for HDRV and BDRV should be kept separate. 2003 Sep 30 further connections to other components or ground paths are not allowed 2 ...
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... Philips Semiconductors 2 I C-bus autosync deflection controller for PC monitors INTERNAL PIN CONFIGURATION PIN SYMBOL 1 HFLB 2 XRAY 3 BOP 4 BSENS 2003 Sep 30 INTERNAL CIRCUIT 1 MBG562 Product specification TDA4856 MBG561 6.25 V 5.3 V MBG563 MBG564 ...
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... Philips Semiconductors 2 I C-bus autosync deflection controller for PC monitors PIN SYMBOL 5 BIN 6 BDRV 7 PGND power ground, connected to substrate 8 HDRV 9 XSEL EWDRV 2003 Sep 30 INTERNAL CIRCUIT 5 MBG565 6 MBG566 8 MGM089 MBK381 10 MGM090 108 11 108 MBG570 48 Product specification TDA4856 ...
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... Philips Semiconductors 2 I C-bus autosync deflection controller for PC monitors PIN SYMBOL 12 VOUT2 13 VOUT1 14 VSYNC 15 HSYNC 16 CLBL 2003 Sep 30 INTERNAL CIRCUIT MBG571 12 MBG572 13 100 1 7 MBG575 49 Product specification TDA4856 MBG573 1.4 V MBG574 ...
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... Philips Semiconductors 2 I C-bus autosync deflection controller for PC monitors PIN SYMBOL 17 HUNLOCK 18 SCL 19 SDA 20 ASCOR 21 VSMOD 2003 Sep 30 INTERNAL CIRCUIT 17 MGM091 18 MGM092 19 MGM093 480 20 MGM094 250 MGM095 50 Product specification TDA4856 ...
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... Philips Semiconductors 2 I C-bus autosync deflection controller for PC monitors PIN SYMBOL 22 VAGC 23 VREF 24 VCAP 25 SGND signal ground 26 HPLL1 2003 Sep 30 INTERNAL CIRCUIT MBG582 24 MBG583 26 4 Product specification TDA4856 MBG581 MGM096 ...
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... Philips Semiconductors 2 I C-bus autosync deflection controller for PC monitors PIN SYMBOL 27 HBUF 28 HREF 29 HCAP 30 HPLL2 2003 Sep 30 INTERNAL CIRCUIT 7 7 HFLB 52 Product specification TDA4856 5 V MGM097 2.525 V MBG585 6.25 V MGM098 ...
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... HSMOD 32 FOCUS Electrostatic discharge (ESD) protection pin Fig.30 ESD protection for pins 13, 16 and 17. 2003 Sep 30 INTERNAL CIRCUIT 31 MBG559 Fig.31 ESD protection for pins Product specification 250 5 V MGM099 120 32 200 120 MGM100 pin 7.3 V 7.3 V and 26 to 32. TDA4856 MBG560 ...
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... VERSION IEC SOT232-1 2003 Sep scale (1) ( 1.3 0.53 0.32 29.4 9.1 0.8 0.40 0.23 28.5 8.7 REFERENCES JEDEC JEITA 54 Product specification 3.2 10.7 12.2 1.778 10.16 2.8 10.2 10.5 EUROPEAN PROJECTION TDA4856 SOT232 ( max. 0.18 1.6 ISSUE DATE 95-02-04 03-02-13 ...
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... If the temperature of the soldering iron bit is less than 300 C it may remain in contact for seconds. If the bit temperature is between 300 and 400 C, contact may seconds. SOLDERING METHOD DIPPING suitable 55 Product specification TDA4856 ). If the stg(max) WAVE (1) suitable not suitable ...
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... Product specification TDA4856 DEFINITION These products are not Philips Semiconductors ...
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... Purchase of Philips I components in the I Philips. This specification can be ordered using the code 9398 393 40011. 2003 Sep components conveys a license under the Philips’ system provided the system conforms to the I 57 Product specification TDA4856 2 C patent to use the 2 C specification defined by ...
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Philips Semiconductors – a worldwide company Contact information For additional information please visit http://www.semiconductors.philips.com. For sales offices addresses send e-mail to: sales.addresses@www.semiconductors.philips.com. © Koninklijke Philips Electronics N.V. 2003 All rights are reserved. Reproduction in whole or in part is prohibited ...