M58BW016DB80T3F

Manufacturer Part NumberM58BW016DB80T3F
ManufacturerMicron Technology Inc
M58BW016DB80T3F datasheet
 

Specifications of M58BW016DB80T3F

Lead Free Status / Rohs StatusNot Compliant  
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Common Flash interface (CFI)
Appendix A
Common Flash interface (CFI)
The common Flash interface is a JEDEC approved, standardized data structure that can be
read from the Flash memory device. It allows a system software to query the device to
determine various electrical and timing parameters, density information and functions
supported by the memory. The system can interface easily with the device, enabling the
software to upgrade itself when necessary.
When the CFI Query command (RCFI) is issued the device enters CFI query mode and the
data structure is read from the memory.
show the addresses used to retrieve the data.
Table 26.
Query structure overview
Offset
00h
01h
10h
CFI Query identification string
1Bh
System interface information
27h
Device geometry definition
Primary algorithm-specific extended query
(1)
P(h)
table
Alternate algorithm-specific extended query
(2)
A(h)
table
1. Offset 15h defines P which points to the primary algorithm extended query address table.
2. Offset 19h defines A which points to the alternate algorithm extended query address table.
Table 27.
CFI - query address and data output
Address A0-A18
10h
11h
12h
13h
14h
15h
16h
17h
18h
19h
1Ah
1. The x 8 or byte address and the x 16 or word address mode are not available.
2. Query data are always presented on DQ7-DQ0. DQ31-DQ8 are set to '0'.
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M58BW016DT, M58BW016DB, M58BW016FT, M58BW016FB
Table
26,
Table
Sub-section name
Data
51h
"Q"
51h; ‘Q’
52h
"R"
Query ASCII String 52h; ‘R’
59h; ‘Y’
59h
"Y"
03h
Primary vendor:
Command set and control interface ID code
00h
35h
Primary algorithm extended query address table:
P(h)
00h
00h
Alternate vendor:
Command Set and Control interface ID code
00h
00h
Alternate algorithm extended query address table
00h
27,
Table
28,
Table 29
and
Description
Manufacturer code
Device code
Command set ID and algorithm data offset
Device timing and voltage information
Flash memory layout
Additional information specific to the primary
algorithm (optional)
Additional information specific to the
alternate algorithm (optional)
(1)(2)
Instruction
Table 30