MC14015BCP ON Semiconductor, MC14015BCP Datasheet

MC14015BCP

Manufacturer Part Number
MC14015BCP
Description
Manufacturer
ON Semiconductor
Type
Not Requiredr
Datasheet

Specifications of MC14015BCP

Technology
CMOS
Number Of Elements
2
Number Of Bits
4
Logic Family
4000
Logical Function
Shift Register
Operating Supply Voltage (typ)
3.3/5/9/12/15V
Output Type
Standard
Package Type
PDIP
Propagation Delay Time
750ns
Operating Temp Range
-55C to 125C
Operating Supply Voltage (min)
3V
Operating Supply Voltage (max)
18V
Operating Temperature Classification
Military
Mounting
Through Hole
Pin Count
16
Lead Free Status / Rohs Status
Not Compliant

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MC14015B
Dual 4−Bit Static
Shift Register
MOS P−Channel and N−Channel enhancement mode devices in a
single monolithic structure. It consists of two identical, independent
4−state serial−input/parallel−output registers. Each register has
independent Clock and Reset inputs with a single serial Data input.
The register states are type D master−slave flip−flops. Data is shifted
from one stage to the next during the positive−going clock transition.
Each register can be cleared when a high level is applied on the Reset
line. These complementary MOS shift registers find primary use in
buffer storage and serial−to−parallel conversion where low power
dissipation and/or noise immunity is desired.
Features
Maximum ratings are those values beyond which device damage can occur.
Maximum ratings applied to the device are individual stress limit values (not
normal operating conditions) and are not valid simultaneously. If these limits are
exceeded, device functional operation is not implied, damage may occur and
reliability may be affected.
1. Temperature Derating:
static voltages or electric fields. However, precautions must be taken to avoid
applications of any voltage higher than maximum rated voltages to this
high−impedance circuit. For proper operation, V
to the range V
(e.g., either V
MAXIMUM RATINGS
© Semiconductor Components Industries, LLC, 2005
August, 2005 − Rev. 6
Symbol
V
I
The MC14015B dual 4−bit static shift register is constructed with
in
This device contains protection circuitry to guard against damage due to high
Unused inputs must always be tied to an appropriate logic voltage level
low; information is transferred to the output only on the positive
going edge of the clock pulse
Schottky TTL Load Over the Rated Temperature Range
in
Diode Protection on All Inputs
Supply Voltage Range = 3.0 Vdc to 18 Vdc
Logic Edge−Clocked Flip−Flop Design
Logic state is retained indefinitely with clock level either high or
Capable of Driving Two Low−power TTL Loads or One Low−power
Pb−Free Packages are Available*
V
T
Plastic “P and D/DW” Packages: – 7.0 mW/_C From 65_C To 125_C
P
, V
, I
T
T
stg
DD
A
D
L
out
out
DC Supply Voltage Range
Input or Output Voltage Range
Input or Output Current
Power Dissipation, per Package
Ambient Temperature Range
Storage Temperature Range
Lead Temperature
SS
SS
(DC or Transient)
(DC or Transient) per Pin
(Note 1)
(8−Second Soldering)
or V
v (V
DD
in
). Unused outputs must be left open.
Parameter
or V
(Voltages Referenced to V
out
) v V
DD
.
in
and V
−0.5 to V
SS
−0.5 to +18.0
−55 to +125
−65 to +150
out
)
Value
± 10
500
260
should be constrained
DD
+ 0.5
1
Unit
mW
mA
°C
°C
°C
V
V
See detailed ordering and shipping information in the package
dimensions section on page 2 of this data sheet.
*For additional information on our Pb−Free strategy
and soldering details, please download the
ON Semiconductor Soldering and Mounting
Techniques Reference Manual, SOLDERRM/D.
ORDERING INFORMATION
A
WL, L
YY, Y
WW, W
G
http://onsemi.com
CASE 751B
CASE 948F
SOEIAJ−16
TSSOP−16
DT SUFFIX
CASE 648
CASE 966
P SUFFIX
D SUFFIX
F SUFFIX
PDIP−16
SOIC−16
= Assembly Location
= Wafer Lot
= Year
= Work Week
= Pb−Free Indicator
Publication Order Number:
16
1
16
16
1
1
DIAGRAMS
16
MARKING
MC14015BCP
AWLYYWWG
1
MC14015B
AWLYWW
MC14015B/D
14015BG
ALYWG
ALYW
015B
14

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MC14015BCP Summary of contents

Page 1

... Pb−Free strategy in out and soldering details, please download the ON Semiconductor Soldering and Mounting Techniques Reference Manual, SOLDERRM/D. 1 http://onsemi.com MARKING DIAGRAMS 16 PDIP−16 MC14015BCP P SUFFIX AWLYYWWG CASE 648 1 16 SOIC−16 14015BG D SUFFIX AWLYWW CASE 751B TSSOP− ...

Page 2

... Don’t Care n−1 ORDERING INFORMATION Device MC14015BCP MC14015BCPG MC14015BD MC14015BDR2 MC14015BDR2G MC14015BDTR2 MC14015BFEL MC14015BFELG †For information on tape and reel specifications, including part orientation and tape sizes, please refer to our Tape and Reel Packaging Specifications Brochure, BRD8011/D. *This package is inherently Pb−Free. ...

Page 3

ELECTRICAL CHARACTERISTICS Î Î Î Î Î ...

Page 4

SWITCHING CHARACTERISTICS (Note 5) Î Î Î ...

Page 5

V DD PULSE GENERATOR SYNC Q2 PULSE C Q3 GENERATOR Figure 2. Switching Test Circuit and Waveforms V DD PULSE GENERATOR SYNC Q2 PULSE C Q3 GENERATOR R ...

Page 6

MC14015B CIRCUIT SCHEMATICS http://onsemi.com 6 ...

Page 7

C DATA C RESET DATA INPUT BUFFER CLOCK INPUT BUFFER RESET INPUT BUFFER DATA INPUT BUFFER CLOCK INPUT BUFFER ...

Page 8

0.25 (0.010) M −A− −B− −T− SEATING PLANE 0.25 (0.010 MC14015B PACKAGE DIMENSIONS ...

Page 9

K 16X REF 0.10 (0.004) 0.15 (0.006 L PIN 1 IDENT. 1 0.15 (0.006 −V− C 0.10 (0.004) SEATING −T− PLANE D MC14015B PACKAGE DIMENSIONS TSSOP−16 DT SUFFIX PLASTIC TSSOP ...

Page 10

... DETAIL P VIEW American Technical Support: 800−282−9855 Toll Free USA/Canada Japan: ON Semiconductor, Japan Customer Focus Center 2−9−1 Kamimeguro, Meguro−ku, Tokyo, Japan 153−0051 Phone: 81−3−5773−3850 http://onsemi.com 10 NOTES: 1. DIMENSIONING AND TOLERANCING PER ANSI Y14.5M, 1982. 2. CONTROLLING DIMENSION: MILLIMETER. ...

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