W49F002U-12B

Manufacturer Part NumberW49F002U-12B
ManufacturerWinbond Electronics
W49F002U-12B datasheet
 


Specifications of W49F002U-12B

Density2MbAccess Time (max)120ns
Interface TypeParallelBoot TypeTop
Address Bus18bOperating Supply Voltage (typ)5V
Operating Temp Range0C to 70CPackage TypePDIP
Program/erase Volt (typ)5VSync/asyncAsynchronous
Operating Temperature ClassificationCommercialOperating Supply Voltage (min)4.5V
Operating Supply Voltage (max)5.5VWord Size8b
Number Of Words256KSupply Current50mA
MountingThrough HolePin Count32
Lead Free Status / Rohs StatusNot Compliant  
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GENERAL DESCRIPTION
The W49F002U is a 2-megabit, 5-volt only CMOS flash memory organized as 256K
device can be programmed and erased in-system with a standard 5V power supply. A 12-volt V
not required. The unique cell architecture of the W49F002U results in fast program/erase operations
with extremely low current consumption (compared to other comparable 5-volt flash memory products).
The device can also be programmed and erased using standard EPROM programmers.
FEATURES
Single 5-volt operations:
5-volt Read
5-volt Erase
5-volt Program
Fast Program operation:
Byte-by-Byte programming: 35 S (typ.)
Fast Erase operation: 100 mS (typ.)
Fast Read access time: 70/90/120 nS
Endurance: 10K cycles (typ.)
Ten-year data retention
Hardware data protection
One 16K byte Boot Block with Lockout
protection
Two 8K byte Parameter Blocks
256K
8 CMOS FLASH MEMORY
Two Main Memory Blocks (96K, 128K) Bytes
Low power consumption
Active current: 25 mA (typ.)
Standby current: 20 A (typ.)
Automatic program and erase timing with
internal V
generation
PP
End of program or erase detection
Toggle bit
Data polling
Latched address and data
TTL compatible I/O
JEDEC standard byte-wide pinouts
Available packages: 32-pin DIP, 32-pin
STSOP (8 mm
(8 mm
20 mm) and 32-pin-PLCC
Publication Release Date: February 21, 2002
- 1 -
W49F002U
8 bits. The
is
PP
14 mm), 32-pin TSOP
Revision A6

W49F002U-12B Summary of contents

  • Page 1

    ... The W49F002U is a 2-megabit, 5-volt only CMOS flash memory organized as 256K device can be programmed and erased in-system with a standard 5V power supply. A 12-volt V not required. The unique cell architecture of the W49F002U results in fast program/erase operations with extremely low current consumption (compared to other comparable 5-volt flash memory products). ...

  • Page 2

    ... DQ3 25 DQ0 Vss 24 DQ2 23 #CE DQ1 22 21 DQ0 W49F002U DQ0 . OUTPUT . CONTROL BUFFER DQ7 BOOT BLOCK 16K BYTES PARAMETER BLOCK1 DECODER 8K BYTES PARAMETER BLOCK2 8K BYTES MAIN MEMORY BLOCK1 96K BYTES MAIN MEMORY BLOCK2 128K BYTES PIN NAME Reset Address Inputs ...

  • Page 3

    ... Device Operation Read Mode The read operation of the W49F002U is controlled by #CE and #OE, both of which have to be low for the host to obtain data from the outputs. #CE is used for device selection. When #CE is high, the chip is de-selected and only standby power will be consumed. #OE is the output control and is used to gate data from the output pins ...

  • Page 4

    ... The manufacturer and device codes may also be read via the command register; i.e., the W49F002U is erased or programmed in a system without access to high voltage on the A9 pin. The command sequence is illustrated in "Auto-select Codes". Byte 0 ( represents the manufacturer s code (Winbond = DAh) and byte 1 ( device identifier code (W49F002U = 0Bh,). All identifiers for manufacturer and device will exhibit odd parity with DQ7 defined as the parity bit ...

  • Page 5

    ... The operation is initiated by writing the auto-select command sequence into the command register. Following the command write, a read cycle from address XX00H retrieves the manufacture code of DAh. A read cycle from address XX01H returns the device code (W49F002U = 0Bh). Byte Program Command The device is programmed on a byte-by-byte basis. Programming is a four-bus-cycle operation. The program command sequence is initiated by writing two " ...

  • Page 6

    ... Refer to the Embedded Erase Algorithm using typical command strings and bus operations. Write Operation Status DQ7: Data Polling The W49F002U device features Data Polling as a method to indicate to the host that the embedded algorithms are in progress or completed. During the Embedded Program Algorithm, an attempt to read the device will produce the complement of the data last written to DQ7 ...

  • Page 7

    ... See " #DATA Polling During Embedded Algorithm Timing Diagrams". DQ6: Toggle Bit The W49F002U also features the "Toggle Bit" method to indicate to the host system that the embedded algorithms are in progress or completed. During an Embedded Program or Erase Algorithm cycle, successive attempts to read (#OE toggling) data from the device at any address will result in DQ6 toggling between one and zero ...

  • Page 8

    ... Auto-select Codes (High Voltage Method) DESCRIPTION Manufacturer ID: Winbond Device ID: W49F002U (Top Boot Block) Notes Sector Address Don t Care. Sector Protection Verification: 01h (protected); 00h (unprotected). 2. The hardware SID read function is not included in all parts; please refer to Ordering Information for details. Hardware Sequence Flags ...

  • Page 9

    ... Embedded Programming Algorithm Increment Address Program Command Sequence (Address/Command): Start Write Program Command Sequence (see below) #Data Polling/ Toggle bit No Last Address ? Yes Programming Completed 5555H/AAH 2AAAH/55H 5555H/A0H Program Address/Program Data Publication Release Date: February 21, 2002 - 9 - W49F002U Pause T BP Revision A6 ...

  • Page 10

    ... Write Erase Command Sequence Chip Erase Command Sequence (Address/Command): 5555H/AAH 2AAAH/55H 5555H/80H 5555H/AAH 2AAAH/55H 5555H/10H Start (see below) #Data Polling or Toggle Bit Successfully Completed Erasure Completed Individual Sector Erase Command Sequence (Address/Command): 5555H/AAH 2AAAH/55H 5555H/80H 5555H/AAH 2AAAH/55H Sector Address/30H - 10 - W49F002U Pause SEC ...

  • Page 11

    ... Start Read Byte (DQ0 - DQ7) Address = Don't Care DQ6 = Toggle ? No Pass Publication Release Date: February 21, 2002 - 11 - W49F002U = Any of the sector addresses within the sector being erased during sector erase operation = Valid address equals any sector group address during chip erase Revision A6 ...

  • Page 12

    ... Read address = 0001 data = 00AE (4) Read address = 0002 data in DQ0 =1/0 DQ0 (Hex); Address Format: A14 A0 (Hex) ; device code is read for W49F002U Product Identification Exit(6) Load data AA to address 5555 Load data 55 to address 2AAA Load data F0 to address 5555 Pause 10 S ...

  • Page 13

    ... Feature Set Flow Load data AA to address 5555 Load data 55 to address 2AAA Load data 80 to address 5555 Load data AA to address 5555 Load data 55 to address 2AAA Load data 40 to address 5555 Pause 200 mS Exit Publication Release Date: February 21, 2002 - 13 - W49F002U Revision A6 ...

  • Page 14

    ... DQs open Address inputs = MHz all DQs open IH Other inputs = # -0.3V, all DQs open DD Other inputs = V -0.3V/ Vss Vss Vss to V OUT 2 -0 W49F002U RATING UNIT -0 +70 C -65 to +150 -0.5 to 12.5 V LIMITS UNIT MIN. TYP. MAX 100 A - ...

  • Page 15

    ... L +5V 1.8K D OUT 30 pF for 70nS / 90nS 100 pF for 120nS 1.3K (Including Jig and Scope) Input Output 3V 1.5V 1.5V 0V Test Point Test Point Publication Release Date: February 21, 2002 - 15 - W49F002U TYPICAL UNIT 100 MAX. UNIT Revision A6 ...

  • Page 16

    ... High Width Data Setup Time Data Hold Time Byte Programming Time Erase Cycle Time Note: All AC timing signals observe the following guidelines for determining setup and hold times: (a) High level signal's reference level is V SYM. W49F002U-70 W49F002U-90 W49F002U-120 MIN. MAX. MIN ...

  • Page 17

    ... Reset Active to Output Float Reset Inactive to Input Active SYM. W49F002U-70 W49F002U-90 MIN. MAX. MIN OEP CEP OET CET SYMBOL MIN PRST T 500 RSTP T - RSTF T 1 RST Publication Release Date: February 21, 2002 - 17 - W49F002U W49F002U-120 UNIT MAX. MIN. MAX 120 120 nS TYP. MAX. UNIT - - Revision A6 ...

  • Page 18

    ... TIMING WAVEFORMS Read Cycle Timing Diagram Address A17-0 #CE # #WE High-Z DQ7-0 #WE Controlled Command Write Cycle Timing Diagram Address A17-0 #CE #OE #WE DQ7 OLZ T CLZ T OH Data Valid OES Data Valid - 18 - W49F002U T OHZ T CHZ High-Z Data Valid OEH T WPH T DH ...

  • Page 19

    ... DQ7-0 Program Cycle Timing Diagram Address A17-0 5555 DQ7-0 #CE #OE T #WE Byte OES High Z Byte Program Cycle 2AAA 5555 WPH WP Byte 1 Byte 2 Publication Release Date: February 21, 2002 - 19 - W49F002U T CPH T OEH T DS Data Valid T DH Address Data- Internal Write Start Byte 3 Revision A6 ...

  • Page 20

    ... Timing Waveforms, continued #DATA Polling Timing Diagram Address A17-0 An #WE #CE #OE DQ7 Toggle Bit Timing Diagram Address A17-0 #WE #CE #OE DQ6 CEP T OEH T OEP OEH W49F002U An T OES OES ...

  • Page 21

    ... Lockout Feature Enable 5555 5555 2AAA 2AAA WPH SB2 SB3 SB4 SB1 Six-byte code for 5V-only software chip erase 5555 5555 2AAA 2AAA WPH SB2 SB3 SB1 SB4 Publication Release Date: February 21, 2002 - 21 - W49F002U 5555 SB5 5555 Internal Erase starts SB5 Revision A6 ...

  • Page 22

    ... Address A17-0 DQ7-0 #CE #OE # Sector Address Reset Timing Diagram VDD #RESET Address A17-0 DQ7-0 Six-byte code for 5V-only software Main Memory Erase 5555 5555 2AAA 5555 2AAA WPH SB0 SB2 SB3 SB1 SB4 T PRST T RSTP T RSTF - 22 - W49F002U Internal Erase starts SB5 T RST ...

  • Page 23

    ... ORDERING INFORMATION PART NO. ACCESS POWER TIME SUPPLY CURRENT (nS) MAX. (mA) W49F002U-70B 70 W49F002U-90B 90 W49F002U-12B 120 W49F002UT70B 70 W49F002UT90B 90 W49F002UT12B 120 W49F002UP70B 70 W49F002UP90B 90 W49F002UP12B 120 W49F002UQ70B 70 W49F002UQ90B 90 W49F002UQ12B 120 W49F002U70BN 70 W49F002U90BN 90 W49F002U12BN 120 W49F002UT70N 70 W49F002UT90N 90 W49F002UT12N 120 W49F002UP70N 70 W49F002UP90N 90 W49F002UP12N 120 W49F002UQ70N 70 W49F002UQ90N 90 W49F002UQ12N 120 Notes: 1 ...

  • Page 24

    ... HOW TO READ THE TOP MARKING Example: The top marking of 48-pin TSOP W49F002UT70B W49F002UT70B 2138977A-A12 149OBSA st 1 line: winbond logo nd 2 line: the part number: W49F002UT70B rd 3 line: the lot number th 4 line: the tracking code: 149 149: Packages made in ’01, wee Assembly house ID: A means ASE, O means OSE, ...etc revision ...

  • Page 25

    ... Seating Plane Base Plane Seating Plane Publication Release Date: February 21, 2002 - 25 - W49F002U Dimension in inches Dimension in mm Symbol Min. Nom. Max. Min. Nom. Max. A 0.210 5.33 A 0.010 0. 0.150 0.155 0.160 3.81 3.94 4. 0.016 0.018 0.022 0.41 0.46 0.56 B 0.048 0.050 0.054 1.22 1 ...

  • Page 26

    ... STSOP ( mm £ 32-pin TSOP ( mm 0.10(0.004 W49F002U Dimension in Inches Dimension in mm Symbol Min. Nom. Max. Min. Nom. Max. A 0.047 1.20 A 0.002 0.006 0.05 1 0.15 A 0.040 0.95 1.00 2 0.035 0.041 1.05 b 0.007 0.009 0.010 0.17 0.22 0.27 c 0.10 0.004 0.008 ----- 0.21 ----- D 0 ...

  • Page 27

    ... Winbond Electronics Corporation Japan 7F Daini-ueno BLDG, 3-7-18 Shinyokohama Kohoku-ku, Yokohama, 222-0033 TEL: 81-45-4781881 FAX: 81-45-4781800 Publication Release Date: February 21, 2002 - 27 - W49F002U DESCRIPTION Write Inhibit description Winbond Electronics (Shanghai) Ltd. 27F, 2299 Yan An W. Rd. Shanghai, 200336 China TEL: 86-21-62365999 FAX: 86-21-62365998 Winbond Electronics (H.K.) Ltd. ...