W49F002U-12B

Manufacturer Part NumberW49F002U-12B
ManufacturerWinbond Electronics
W49F002U-12B datasheet
 


Specifications of W49F002U-12B

Density2MbAccess Time (max)120ns
Interface TypeParallelBoot TypeTop
Address Bus18bOperating Supply Voltage (typ)5V
Operating Temp Range0C to 70CPackage TypePDIP
Program/erase Volt (typ)5VSync/asyncAsynchronous
Operating Temperature ClassificationCommercialOperating Supply Voltage (min)4.5V
Operating Supply Voltage (max)5.5VWord Size8b
Number Of Words256KSupply Current50mA
MountingThrough HolePin Count32
Lead Free Status / Rohs StatusNot Compliant  
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W49F002U
Command Definitions
Device operations are selected by writing specific address and data sequences into the command
register. Writing incorrect address and data values or writing them in the improper sequence will reset
the device to the read mode. "Command Definitions" defines the valid register command sequences.
Moreover, both Reset/Read commands are functionally equivalent, resetting the device to the read
mode.
Read Command
The device will automatically power-up in the read state. In this case, a command sequence is not
required to read data. Standard microprocessor read cycles will retrieve array data. This default value
ensures that no spurious alteration of the memory content occurs during the power transition.
The device will automatically returns to read state after completing an Embedded Program or
Embedded Erase algorithm.
Refer to the AC Read Characteristics and Waveforms for the specific timing parameters.
Auto-select Command
Flash memories are intended for use in applications where the local CPU can alter memory contents.
As such, manufacture and device codes must be accessible while the device resides in the target
system. PROM programmers typically access the signature codes by raising A9 to a high voltage.
However, multiplexing high voltage onto the address lines is not generally a desirable system design
practice.
The device contains an auto-select command operation to supplement traditional PROM programming
methodology. The operation is initiated by writing the auto-select command sequence into the
command register. Following the command write, a read cycle from address XX00H retrieves the
manufacture code of DAh. A read cycle from address XX01H returns the device code (W49F002U =
0Bh).
Byte Program Command
The device is programmed on a byte-by-byte basis. Programming is a four-bus-cycle operation. The
program command sequence is initiated by writing two "unlock" write cycles, followed by the program
set-up command. The program address and data are written next, which in turn initiate the Embedded
program algorithm. Addresses are latched on the falling edge of #CE or #WE, whichever happens later
and the data is latched on the rising edge of #CE or #WE, whichever happens first. The rising edge of
#CE or #WE (whichever happens first) begins programming using the Embedded Program Algorithm.
Upon executing the algorithm, the system is not required to provide further controls or timings. The
device will automatically provide adequate internally generated program pulses and verify the
programmed cell margin.
The automatic programming operation is completed when the data on DQ7 (also used as Data Polling)
is equivalent to the data written to this bit at which time the device returns to the read mode and
addresses are no longer latched (see "Hardware Sequence Flags"). Therefore, the device requires that
a valid address to the device be supplied by the system at this particular instance of time for Data
Polling operations. Data Polling must be performed at the memory location which is being
programmed.
Publication Release Date: February 21, 2002
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Revision A6