K6T0808C1D-DL70

Manufacturer Part NumberK6T0808C1D-DL70
ManufacturerSamsung Semiconductor
K6T0808C1D-DL70 datasheet
 


Specifications of K6T0808C1D-DL70

Density256KbAccess Time (max)70ns
Sync/asyncAsynchronousArchitectureNot Required
Clock Freq (max)Not RequiredMHzOperating Supply Voltage (typ)5V
Address Bus15bPackage TypePDIP
Operating Temp Range0C to 70CNumber Of Ports1
Supply Current60mAOperating Supply Voltage (min)4.5V
Operating Supply Voltage (max)5.5VOperating Temperature ClassificationCommercial
MountingThrough HolePin Count28
Word Size8bNumber Of Words32K
Lead Free Status / Rohs StatusNot Compliant  
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K6T0808C1D Family
Document Title
32Kx8 bit Low Power CMOS Static RAM
Revision History
Revision No
History
0.0
Initial draft
0.1
First revision
-
M62256DL/DLI I
= 100
K
SB1
KM62256DL-L I
= 20
SB1
KM62256DLI-L I
= 50
SB1
- C
= 6
8pF, C
= 8
IN
IO
- KM62256D-4/5/7 Family
tOH = 5
10ns
- KM62256DL/DLI I
= 50 30 A
DR
KM62256DL-L/DLI-L I
DR
1.0
Finalize
- Remove I
write value
CC
- Improved operating current
I
= 70
60mA
CC2
- Improved standby current
KM62256DL/DLI I
= 50
SB1
KM62256DL-L I
= 10
SB1
KM62256DLI-L I
= 15
SB1
- Improved data retention current
KM62256DL/DLI I
= 30
DR
KM62256DL-L/DLI-L I
DR
- Remove 45ns part from commercial product and 100ns part
from industrial product.
Replace test load 100pF to 50pF for 55ns part
The attached datasheets are provided by SAMSUNG Electronics. SAMSUNG Electronics CO., LTD. reserves the right to change the specifications and
products. SAMSUNG Electronics will answer to your questions about device. If you have any questions, please contact the SAMSUNG branch offices.
50 A
10 A
15 A
10pF
= 30
15 A
30 A
5 A
5 A
5 A
= 15
3 A
CMOS SRAM
Draft Data
Remark
May 18, 1997
Design target
April 1, 1997
Preliminily
November 11, 1997
Final
Revision 1.01
November 1997

K6T0808C1D-DL70 Summary of contents

  • Page 1

    ... K6T0808C1D Family Document Title 32Kx8 bit Low Power CMOS Static RAM Revision History Revision No History 0.0 Initial draft 0.1 First revision - M62256DL/DLI I = 100 K SB1 KM62256DL SB1 KM62256DLI SB1 - 8pF KM62256D-4/5/7 Family tOH = 5 10ns - KM62256DL/DLI KM62256DL-L/DLI 1.0 Finalize - Remove I write value CC - Improved operating current ...

  • Page 2

    ... SAMSUNG ELECTRONICS CO., LTD. reserves the right to change products and specifications without notice. GENERAL DESCRIPTION The K6T0808C1D families are fabricated by SAMSUNG s advanced CMOS process technology. The families support various operating temperature ranges and have various package types for user flexibility of system design. The fami- lies also support low data retention voltage for battery back- up operation with low data retention current ...

  • Page 3

    ... K6T0808C1D Family PRODUCT LIST Commercial Temperature Products(0~70 C) Part Name Function K6T0808C1D-DL55 28-DIP, 55ns, L-pwr K6T0808C1D-DB55 28-DIP, 55ns, LL-pwr K6T0808C1D-DL70 28-DIP, 70ns, L-pwr K6T0808C1D-DB70 28-DIP, 70ns, LL-pwr K6T0808C1D-GL55 28-SOP, 55ns, L-pwr K6T0808C1D-GB55 28-SOP, 55ns, LL-pwr K6T0808C1D-GL70 28-SOP, 70ns, L-pwr K6T0808C1D-GB70 28-SOP, 70ns, LL-pwr ...

  • Page 4

    ... K6T0808C1D Family RECOMMENDED DC OPERATING CONDITIONS Item Supply voltage Ground Input high voltage Input low voltage Note: 1. Commercial Product otherwise specified A Industrial Product otherwise specified A 2. Overshoot: V +3.0V in case of pulse width 30ns CC 3. Undershoot: -3.0V in case of pulse width 30ns 4. Overshoot and undershoot are sampled, not 100% tested ...

  • Page 5

    ... K6T0808C1D Family AC OPERATING CONDITIONS TEST CONDITIONS (Test Load and Test Input/Output Reference) Input pulse level: 0.8 to 2.4V Input rising and falling time: 5ns Input and output reference voltage: 1.5V Output load (See right): C =100pF+1TTL L C =50pF+1TTL L AC CHARACTERISTICS (Vcc=4.5~5.5V, Commercial product: T ...

  • Page 6

    ... K6T0808C1D Family TIMING DIAGRAMS TIMING WAVEFORM OF READ CYCLE(1) Address Data Out Previous Data Valid TIMING WAVEFORM OF READ CYCLE(2) Address CS OE High-Z Data out NOTES (READ CYCLE and are defined as the time at which the outputs achieve the open circuit conditions and are not referenced to output voltage ...

  • Page 7

    ... K6T0808C1D Family TIMING WAVEFORM OF WRITE CYCLE(1) Address CS WE Data in Data Undefined Data out TIMING WAVEFORM OF WRITE CYCLE(2) Address CS WE Data in Data out NOTES (WRITE CYCLE write occurs during the overlap of a low CS and a low WE. A write begins at the latest transition among CS going Low and WE going low : A write end at the earliest transition among CS going high and WE going high the end of write ...

  • Page 8

    ... K6T0808C1D Family PACKAGE DIMENSIONS 28 PIN DUAL INLINE PACKAGE(600mil) #28 13.60 0.20 0.535 0.008 #1 1. 0.065 28 PIN PLASTIC SMALL OUTLINE PACKAGE(450mil) #28 #1 18.69 0.736 18.29 0.720 0.89 0.41 0. 0.035 0.016 0.004 #15 #14 36.72 MAX 1.446 36.32 0.20 1.430 0.008 0.46 0.10 0.018 0.004 2 ...

  • Page 9

    ... K6T0808C1D Family PACKAGE DIMENSIONS 28 PIN THIN SMALL OUTLINE PACKAGE TYPE1 (0813.4F) +0.10 0.20 -0.05 +0.004 0.008 -0.002 #1 0.55 #14 0.0217 0.25 TYP 0.010 0~8 0.45 ~0.75 0.018 ~0.030 28 PIN THIN SMALL OUTLINE PACKAGE TYPE1 (0813.4R) +0.10 0.20 -0.05 +0.004 0.008 -0.002 #14 0.55 ...