MC68HC711E9FU Freescale Semiconductor, MC68HC711E9FU Datasheet - Page 79

• Manufacturer Part Number: MC68HC711E9FU
• Manufacturer: Freescale Semiconductor

Specifications of MC68HC711E9FU

• Cpu Family: HC11
• Device Core Size: 8b
• Frequency (max): 4MHz
• Interface Type: SCI/SPI
• Program Memory Type: EPROM
• Program Memory Size: 12KB
• Total Internal Ram Size: 512Byte
• # I/os (max): 38
• Number Of Timers - General Purpose: 8
• Operating Supply Voltage (typ): 3.3/5V
• Operating Supply Voltage (max): 5.5V
• Operating Supply Voltage (min): 3V
• On-chip Adc: 8-chx8-bit
• Instruction Set Architecture: CISC
• Operating Temp Range: 0C to 70C
• Operating Temperature Classification: Commercial
• Mounting: Surface Mount
• Pin Count: 64
• Package Type: PQFP
• Lead Free Status / Rohs Status: Not Compliant

Chapter 5
Resets and Interrupts
5.1 Introduction
Resets and interrupt operations load the program counter with a vector that points to a new location from
which instructions are to be fetched. A reset immediately stops execution of the current instruction and
forces the program counter to a known starting address. Internal registers and control bits are initialized
so the MCU can resume executing instructions. An interrupt temporarily suspends normal program
execution while an interrupt service routine is being executed. After an interrupt has been serviced, the
main program resumes as if there had been no interruption.
5.2 Resets
The four possible sources of reset are:
POR and RESET share the normal reset vector. COP reset and the clock monitor reset each has its own
vector.
5.2.1 Power-On Reset (POR)
A positive transition on V
conditions. POR cannot be used to detect drops in power supply voltages. A 4064 t
cycle) delay after the oscillator becomes active allows the clock generator to stabilize. If RESET is at
logical 0 at the end of 4064 t
The POR circuit only initializes internal circuitry during cold starts. Refer to
Figure 1-7. External Reset
Freescale Semiconductor
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Power-on reset (POR)
External reset (RESET)
Computer operating properly (COP) reset
Clock monitor reset
It is important to protect the MCU during power transitions. Most M68HC11
systems need an external circuit that holds the RESET pin low whenever
V
detector, or other external reset circuits, are the usual source of reset in a
system.
DD
is below the minimum operating level. This external voltage level
DD
Circuit.
generates a power-on reset (POR), which is used only for power-up
CYC
, the CPU remains in the reset condition until RESET goes to logical 1.
M68HC11E Family Data Sheet, Rev. 5.1
NOTE
CYC
(internal clock
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