MC68HC711E9FU

Manufacturer Part NumberMC68HC711E9FU
ManufacturerFreescale Semiconductor
MC68HC711E9FU datasheet
 

Specifications of MC68HC711E9FU

Cpu FamilyHC11Device Core Size8b
Frequency (max)4MHzInterface TypeSCI/SPI
Program Memory TypeEPROMProgram Memory Size12KB
Total Internal Ram Size512Byte# I/os (max)38
Number Of Timers - General Purpose8Operating Supply Voltage (typ)3.3/5V
Operating Supply Voltage (max)5.5VOperating Supply Voltage (min)3V
On-chip Adc8-chx8-bitInstruction Set ArchitectureCISC
Operating Temp Range0C to 70COperating Temperature ClassificationCommercial
MountingSurface MountPin Count64
Package TypePQFPLead Free Status / Rohs StatusNot Compliant
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Page 156/242

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Electrical Characteristics
10.9 Control Timing
(1) (2)
Characteristic
Frequency of operation
E-clock period
Crystal frequency
External oscillator frequency
Processor control setup time
t
= 1/4 t
+ 50 ns
PCSU
CYC
Reset input pulse width
To guarantee external reset vector
Minimum input time (can be pre-empted by internal reset)
Mode programming setup time
Mode programming hold time
Interrupt pulse width, IRQ edge-sensitive mode
PW
= t
+ 20 ns
IRQ
CYC
Wait recovery startup time
Timer pulse width input capture pulse accumulator input
PW
= t
+ 20 ns
TIM
CYC
= 5.0 Vdc ±10%, V
1. V
= 0 Vdc, T
DD
SS
erwise noted
2. RESET is recognized during the first clock cycle it is held low. Internal circuitry then drives the pin low for four clock cycles,
releases the pin, and samples the pin level two cycles later to determine the source of the interrupt. Refer to
Resets and Interrupts
for further detail.
156
1.0 MHz
Symbol
Min
f
dc
o
100
t
CYC
f
XTAL
4 f
dc
o
t
300
PCSU
PW
RSTL
t
MPS
t
10
MPH
102
PW
IRQ
t
WRS
102
PW
TIM
= T
to T
, all timing is shown with respect to 20% V
A
L
H
M68HC11E Family Data Sheet, Rev. 5.1
2.0 MHz
3.0 MHz
Max
Min
Max
Min
Max
1.0
dc
2.0
dc
3.0
500
333
0
4.0
8.0
12.0
4.0
dc
8.0
dc
12.0
175
133
8
8
8
1
1
1
2
2
2
10
10
520
353
0
4
4
4
520
353
0
and 70% V
, unless oth-
DD
DD
Chapter 5
Freescale Semiconductor
Unit
MHz
ns
MHz
MHz
ns
t
CYC
t
CYC
ns
ns
t
CYC
ns