MC68HC711E9FU Freescale Semiconductor, MC68HC711E9FU Datasheet - Page 36

• Manufacturer Part Number: MC68HC711E9FU
• Manufacturer: Freescale Semiconductor

Specifications of MC68HC711E9FU

• Cpu Family: HC11
• Device Core Size: 8b
• Frequency (max): 4MHz
• Interface Type: SCI/SPI
• Program Memory Type: EPROM
• Program Memory Size: 12KB
• Total Internal Ram Size: 512Byte
• # I/os (max): 38
• Number Of Timers - General Purpose: 8
• Operating Supply Voltage (typ): 3.3/5V
• Operating Supply Voltage (max): 5.5V
• Operating Supply Voltage (min): 3V
• On-chip Adc: 8-chx8-bit
• Instruction Set Architecture: CISC
• Operating Temp Range: 0C to 70C
• Operating Temperature Classification: Commercial
• Mounting: Surface Mount
• Pin Count: 64
• Package Type: PQFP
• Lead Free Status / Rohs Status: Not Compliant

Operating Modes and On-Chip Memory
36
$101A
$101B
$101C
$101D
$101E
$1019
$101F
$1020
$1021
$1022
$1023
$1024
Addr.
Timer Output Compare 2 Register
Timer Output Compare 3 Register
Timer Output Compare 3 Register
Timer Output Compare 4 Register
Timer Output Compare 4 Register
Timer Interrupt Mask 1 Register
Timer Interrupt Mask 2 Register
Timer Input Capture 4/Output
Timer Input Capture 4/Output
Compare 5 Register High
Compare 5 Register Low
Register Name
Timer Control Register 1
Timer Control Register 2
(TI4/O5)
(TI4/O5)
Timer Interrupt Flag 1
Figure 2-7. Register and Control Bit Assignments (Sheet 3 of 6)
See page 134.
See page 135.
See page 135.
See page 135.
See page 135.
See page 133.
See page 133.
See page 137.
See page 131.
See page 138.
See page 138.
See page 139.
High (TOC3H)
High (TOC4H)
Low (TOC2L)
Low (TOC3L)
Low (TOC4L)
(TMSK1)
(TMSK2)
(TFLG1)
(TCTL1)
(TCTL2)
Reset:
Reset:
Reset:
Reset:
Reset:
Reset:
Reset:
Reset:
Reset:
Reset:
Reset:
Reset:
Read:
Write:
Read:
Write:
Read:
Write:
Read:
Write:
Read:
Write:
Read:
Write:
Read:
Write:
Read:
Write:
Read:
Write:
Read:
Write:
Read:
Write:
Read:
Write:
M68HC11E Family Data Sheet, Rev. 5.1
I = Indeterminate after reset
EDG4B
Bit 15
Bit 15
Bit 15
OC1F
Bit 7
Bit 7
Bit 7
Bit 7
OC1I
Bit 7
OM2
TOI
1
1
1
1
1
1
1
0
0
0
0
0
= Unimplemented
EDG4A
Bit 14
Bit 14
Bit 14
OC2F
Bit 6
Bit 6
Bit 6
Bit 6
OC2I
OL2
RTII
1
1
1
1
1
1
1
6
0
0
0
0
0
EDG1B
Bit 13
Bit 13
Bit 13
PAOVI
OC3F
Bit 5
Bit 5
Bit 5
Bit 5
OC3I
OM3
5
1
1
1
1
1
1
1
0
0
0
0
0
EDG1A
Bit 12
Bit 12
Bit 12
OC4F
Bit 4
Bit 4
Bit 4
Bit 4
OC4I
OL3
PAII
1
1
1
1
1
1
1
R
4
0
0
0
0
0
= Reserved
EDG2B
Bit 11
Bit 11
Bit 11
I4/O5F
I4/O5I
Bit 3
Bit 3
Bit 3
Bit 3
OM4
1
1
1
1
1
1
1
3
0
0
0
0
0
EDG2A
Bit 10
Bit 10
Bit 10
U = Unaffected
Bit 2
Bit 2
Bit 2
Bit 2
IC1F
OL4
IC1I
Freescale Semiconductor
1
1
1
1
1
1
1
2
0
0
0
0
0
EDG3B
Bit 1
Bit 9
Bit 1
Bit 9
Bit 1
Bit 9
Bit 1
OM5
IC2F
PR1
IC2I
1
1
1
1
1
1
1
1
0
0
0
0
0
EDG3A
Bit 0
Bit 8
Bit 0
Bit 8
Bit 0
Bit 8
Bit 0
IC3F
Bit 0
OL5
IC3I
PR0
1
1
1
1
1
1
1
0
0
0
0
0