MC68HC711E9FU Freescale Semiconductor, MC68HC711E9FU Datasheet - Page 38

• Manufacturer Part Number: MC68HC711E9FU
• Manufacturer: Freescale Semiconductor

Specifications of MC68HC711E9FU

• Cpu Family: HC11
• Device Core Size: 8b
• Frequency (max): 4MHz
• Interface Type: SCI/SPI
• Program Memory Type: EPROM
• Program Memory Size: 12KB
• Total Internal Ram Size: 512Byte
• # I/os (max): 38
• Number Of Timers - General Purpose: 8
• Operating Supply Voltage (typ): 3.3/5V
• Operating Supply Voltage (max): 5.5V
• Operating Supply Voltage (min): 3V
• On-chip Adc: 8-chx8-bit
• Instruction Set Architecture: CISC
• Operating Temp Range: 0C to 70C
• Operating Temperature Classification: Commercial
• Mounting: Surface Mount
• Pin Count: 64
• Package Type: PQFP
• Lead Free Status / Rohs Status: Not Compliant

Operating Modes and On-Chip Memory
38
1. MC68HC711E20 only
$103A
$103B
$103C
$103D
$1031
$1032
$1033
$1034
$1035
$1036
$1037
$1038
$1039
Addr.
EPROM and EEPROM Program-
Highest Priority I Bit Interrupt and
Miscellaneous Register (HPRIO)
ming Control Register (PPROG)
Arm/Reset COP Timer Circuitry
RAM and I/O Mapping Register
EPROM Programming Control
System Configuration Options
Analog-to-Digital Results
Analog-to-Digital Results
Analog-to-Digital Results
Analog-to-Digital Results
Register Name
Block Protect Register
Register (EPROG)
Register (COPRST)
Register (OPTION)
Register 1 (ADR1)
Register 2 (ADR2)
Register 3 (ADR3)
Register 4 (ADR4)
Figure 2-7. Register and Control Bit Assignments (Sheet 5 of 6)
See page 53.
See page 64.
See page 64.
See page 64.
See page 64.
See page 52.
See page 46.
See page 81.
See page 49.
See page 41.
See page 45.
Reserved
Reserved
(BPROT)
(INIT)
(1)
Reset:
Reset:
Reset:
Reset:
Reset:
Reset:
Reset:
Reset:
Reset:
Reset:
Reset:
Read:
Write:
Read:
Write:
Read:
Write:
Read:
Write:
Read:
Write:
Read:
Write:
Read:
Write:
Read:
Write:
Read:
Write:
Read:
Write:
Read:
Write:
M68HC11E Family Data Sheet, Rev. 5.1
I = Indeterminate after reset
RBOOT
ADPU
RAM3
Bit 7
Bit 7
Bit 7
Bit 7
Bit 7
Bit 7
MBE
ODD
R
R
0
0
0
0
0
0
0
= Unimplemented
SMOD
RAM2
CSEL
EVEN
Bit 6
Bit 6
Bit 6
Bit 6
Bit 6
R
R
6
0
0
0
0
0
0
0
ELAT
IRQE
RAM1
ELAT
Bit 5
Bit 5
Bit 5
Bit 5
Bit 5
MDA
R
R
5
0
0
0
0
0
0
0
(2)
(1)
Indeterminate after reset
Indeterminate after reset
Indeterminate after reset
Indeterminate after reset
IRV(NE)
PTCON
EXCOL
DLY
RAM0
BYTE
Bit 4
Bit 4
Bit 4
Bit 4
Bit 4
R
R
R
4
1
0
1
0
0
0
0
(1)
= Reserved
EXROW
BPRT3
PSEL3
REG3
Bit 3
Bit 3
Bit 3
Bit 3
Bit 3
ROW
CME
R
R
3
1
0
0
0
0
0
0
ERASE
BPRT2
PSEL2
U = Unaffected
REG2
Bit 2
Bit 2
Bit 2
Bit 2
Bit 2
T1
Freescale Semiconductor
R
R
2
1
0
0
0
0
1
0
BPRT1
EELAT
PSEL1
CR1
REG1
Bit 1
Bit 1
Bit 1
Bit 1
Bit 1
T0
R
R
1
1
0
0
0
0
1
0
(1)
BPRT0
CR0
PSEL0
EPGM
REG0
Bit 0
Bit 0
Bit 0
Bit 0
Bit 0
PGM
Bit 0
R
R
1
0
0
0
0
0
1
(1)