MC68HC711E9FU

Manufacturer Part NumberMC68HC711E9FU
ManufacturerFreescale Semiconductor
MC68HC711E9FU datasheet
 


Specifications of MC68HC711E9FU

Cpu FamilyHC11Device Core Size8b
Frequency (max)4MHzInterface TypeSCI/SPI
Program Memory TypeEPROMProgram Memory Size12KB
Total Internal Ram Size512Byte# I/os (max)38
Number Of Timers - General Purpose8Operating Supply Voltage (typ)3.3/5V
Operating Supply Voltage (max)5.5VOperating Supply Voltage (min)3V
On-chip Adc8-chx8-bitInstruction Set ArchitectureCISC
Operating Temp Range0C to 70COperating Temperature ClassificationCommercial
MountingSurface MountPin Count64
Package TypePQFPLead Free Status / Rohs StatusNot Compliant
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Table 5-3. Highest Priority Interrupt Selection
PSEL[3:0]
0 0 0 0
0 0 0 1
0 0 1 0
0 0 1 1
0 1 0 0
0 1 0 1
0 1 1 0
0 1 1 1
1 0 0 0
1 0 0 1
1 0 1 0
1 0 1 1
1 1 0 0
1 1 0 1
1 1 1 0
1 1 1 1
5.5 Interrupts
The MCU has 18 interrupt vectors that support 22 interrupt sources. The 15 maskable interrupts are
generated by on-chip peripheral systems. These interrupts are recognized when the global interrupt mask
bit (I) in the condition code register (CCR) is clear. The three non-maskable interrupt sources are illegal
opcode trap, software interrupt, and XIRQ pin. Refer to
vector assignments for each source.
For some interrupt sources, such as the SCI interrupts, the flags are automatically cleared during the
normal course of responding to the interrupt requests. For example, the RDRF flag in the SCI system is
cleared by the automatic clearing mechanism consisting of a read of the SCI status register while RDRF
is set, followed by a read of the SCI data register. The normal response to an RDRF interrupt request
would be to read the SCI status register to check for receive errors, then to read the received data from
the SCI data register. These steps satisfy the automatic clearing mechanism without requiring special
instructions.
Freescale Semiconductor
Interrupt Source Promoted
Timer overflow
Pulse accumulator overflow
Pulse accumulator input edge
SPI serial transfer complete
SCI serial system
Reserved (default to IRQ)
IRQ (external pin or parallel I/O)
Real-time interrupt
Timer input capture 1
Timer input capture 2
Timer input capture 3
Timer output compare 1
Timer output compare 2
Timer output compare 3
Timer output compare 4
Timer input capture 4/output compare 5
Table
5-4, which shows the interrupt sources and
M68HC11E Family Data Sheet, Rev. 5.1
Interrupts
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