MC68HC711E9FU

Manufacturer Part NumberMC68HC711E9FU
ManufacturerFreescale Semiconductor
MC68HC711E9FU datasheet
 

Specifications of MC68HC711E9FU

Cpu FamilyHC11Device Core Size8b
Frequency (max)4MHzInterface TypeSCI/SPI
Program Memory TypeEPROMProgram Memory Size12KB
Total Internal Ram Size512Byte# I/os (max)38
Number Of Timers - General Purpose8Operating Supply Voltage (typ)3.3/5V
Operating Supply Voltage (max)5.5VOperating Supply Voltage (min)3V
On-chip Adc8-chx8-bitInstruction Set ArchitectureCISC
Operating Temp Range0C to 70COperating Temperature ClassificationCommercial
MountingSurface MountPin Count64
Package TypePQFPLead Free Status / Rohs StatusNot Compliant
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Page 98/242

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Parallel Input/Output (I/O) Ports
6.2 Port A
Port A shares functions with the timer system and has:
Three input-only pins
Three output-only pins
Two bidirectional I/O pins
Address:
$1000
Bit 7
Read:
PA7
Write:
Reset:
I
Alternate function:
PAI
And/or:
OC1
I = Indeterminate after reset
Figure 6-1. Port A Data Register (PORTA)
Address:
$1026
Bit 7
Read:
DDRA7
Write:
Reset:
0
Figure 6-2. Pulse Accumulator Control Register (PACTL)
DDRA7 — Data Direction for Port A Bit 7
Overridden if an output compare function is configured to control the PA7 pin
0 = Input
1 = Output
The pulse accumulator uses port A bit 7 as the PAI input, but the pin can also be used as
general-purpose I/O or as an output compare.
Even when port A bit 7 is configured as an output, the pin still drives the
input to the pulse accumulator.
PAEN — Pulse Accumulator System Enable Bit
Refer to
Chapter 9 Timing
Systems.
PAMOD — Pulse Accumulator Mode Bit
Refer to
Chapter 9 Timing
Systems.
PEDGE — Pulse Accumulator Edge Control Bit
Refer to
Chapter 9 Timing
Systems.
DDRA3 — Data Direction for Port A Bit 3
This bit is overridden if an output compare function is configured to control the PA3 pin.
0 = Input
1 = Output
I4/O5 — Input Capture 4/Output Compare 5 Bit
Refer to
Chapter 9 Timing
Systems.
RTR[1:0] — RTI Interrupt Rate Select Bits
Refer to
Chapter 9 Timing
Systems.
98
6
5
4
3
PA6
PA5
PA4
PA3
0
0
0
I
OC2
OC3
OC4
IC4/OC5
OC1
OC1
OC1
OC1
6
5
4
3
PAEWN
PAMOD
PEDGE
DDRA3
0
0
0
0
NOTE
M68HC11E Family Data Sheet, Rev. 5.1
2
1
Bit 0
PA2
PA1
PA0
I
I
I
IC1
IC2
IC3
2
1
Bit 0
I4/O5
RTR1
RTR0
0
0
0
Freescale Semiconductor