MC68HC11E1CFN3R2 Freescale Semiconductor, MC68HC11E1CFN3R2 Datasheet - Page 136

• Manufacturer Part Number: MC68HC11E1CFN3R2
• Manufacturer: Freescale Semiconductor

Specifications of MC68HC11E1CFN3R2

• Cpu Family: HC11
• Device Core Size: 8b
• Frequency (max): 3MHz
• Interface Type: SCI/SPI
• Program Memory Type: ROMLess
• Program Memory Size: Not Required
• Total Internal Ram Size: 512Byte
• # I/os (max): 38
• Number Of Timers - General Purpose: 8
• Operating Supply Voltage (typ): 3.3/5V
• Operating Supply Voltage (max): 5.5V
• Operating Supply Voltage (min): 3V
• On-chip Adc: 8-chx8-bit
• Instruction Set Architecture: CISC
• Operating Temp Range: -40C to 85C
• Operating Temperature Classification: Industrial
• Mounting: Surface Mount
• Pin Count: 52
• Package Type: PLCC
• Lead Free Status / Rohs Status: Not Compliant

Timing Systems
FOC[1:5] — Force Output Comparison Bit
Bits [2:0] — Unimplemented
9.4.3 Output Compare Mask Register
Use OC1M with OC1 to specify the bits of port A that are affected by a successful OC1 compare. The bits
of the OC1M register correspond to PA[7:3].
OC1M[7:3] — Output Compare Masks
Bits [2:0] — Unimplemented
9.4.4 Output Compare Data Register
Use this register with OC1 to specify the data that is to be stored on the affected pin of port A after a
successful OC1 compare. When a successful OC1 compare occurs, a data bit in OC1D is stored in the
corresponding bit of port A for each bit that is set in OC1M.
If OC1Mx is set, data in OC1Dx is output to port A bit x on successful OC1 compares.
Bits [2:0] — Unimplemented
136
When the FOC bit associated with an output compare circuit is set, the output compare circuit
immediately performs the action it is programmed to do when an output match occurs.
Always read 0
Always read 0
Always read 0
0 = Not affected
1 = Output x action occurs
0 = OC1 disabled
1 = OC1 enabled to control the corresponding pin of port A
Address:
Address:
Reset:
Reset:
Read:
Read:
Write:
Write:
OC1M7
OC1D7
$100C
Figure 9-13. Output Compare 1 Mask Register (OC1M)
$100D
Figure 9-14. Output Compare 1 Data Register (OC1D)
Bit 7
Bit 7
0
0
= Unimplemented
= Unimplemented
OC1M6
OC1D6
6
0
6
0
M68HC11E Family Data Sheet, Rev. 5.1
OC1M5
OC1D5
5
0
5
0
OC1M4
OC1D4
4
0
4
0
OC1M3
OC1D3
3
0
3
0
2
0
2
0
1
0
1
0
Freescale Semiconductor
Bit 0
Bit 0
0
0