MC68HC11E1CFN3R2 Freescale Semiconductor, MC68HC11E1CFN3R2 Datasheet - Page 219

• Manufacturer Part Number: MC68HC11E1CFN3R2
• Manufacturer: Freescale Semiconductor

Specifications of MC68HC11E1CFN3R2

• Cpu Family: HC11
• Device Core Size: 8b
• Frequency (max): 3MHz
• Interface Type: SCI/SPI
• Program Memory Type: ROMLess
• Program Memory Size: Not Required
• Total Internal Ram Size: 512Byte
• # I/os (max): 38
• Number Of Timers - General Purpose: 8
• Operating Supply Voltage (typ): 3.3/5V
• Operating Supply Voltage (max): 5.5V
• Operating Supply Voltage (min): 3V
• On-chip Adc: 8-chx8-bit
• Instruction Set Architecture: CISC
• Operating Temp Range: -40C to 85C
• Operating Temperature Classification: Industrial
• Mounting: Surface Mount
• Pin Count: 52
• Package Type: PLCC
• Lead Free Status / Rohs Status: Not Compliant

NOTES:
MC68HC11A0
MC68HC11A1
MC68HC11A8
MC68SEC11A8
MC68HC11D3
MC68HC711D3
MC68HC811E2
MC68SEC811E2
MC68HC11E0
MC68HC11E1
MC68HC11E9
MC68SEC11E9
MC68HC711E9
MC68HC11F1
MC68HC11K4
MC68HC711K4
1. By sending $00 or a break as the first SCI character after reset in bootstrap mode, a jump (JMP) is executed to the address in this table rather than
2. If $55 is received as the first character after reset in bootstrap mode, a jump (JMP) is executed to the start of on-chip RAM rather than doing a
3. A callable utility subroutine is included in the bootstrap ROM of the indicated versions to program bytes of on-chip EPROM with data received via the
4. A callable utility subroutine is included in the bootstrap ROM of the indicated versions to upload contents of on-chip memory to a host computer via
5. The complete listing for this bootstrap ROM may be found in the M68HC11 Reference Manual, Freescale document order number M68HC11RM/AD.
6. The complete listing for this bootstrap ROM is available in the freeware area of the Freescale Web site.
7. Due to the extra program space needed for EEPROM security on this device, there are no pseudo-vectors for SCI, SPI, PAIF, PAOVF, TOF, OC5F,
8. This bootloader extends the automatic software detection of baud rates to include 9600 baud at 2-MHz E-clock rate.
MCU Part
doing a download. Unless otherwise noted, this address is the start of EEPROM. Tying RxD to TxD and using a pullup resistor from TxD to V
cause the SCI to see a break as the first received character.
download. This $55 character must be sent at the default baud rate (7812 baud @ E = 2 MHz). For devices with variable-length download, the same
effect can be achieved by sending $FF and no other SCI characters. After four SCI character times, the download terminates, and a jump (JMP) to
the start of RAM is executed.
The jump to RAM feature is only useful if the RAM was previously loaded with a meaningful program.
SCI.
the SCI.
or OC4F interrupts.
(@$BFD1)
Revision
$42(B)
$41(A)
$42(B)
$42(B)
BOOT
$30(0)
ROM
$00
—
—
—
—
—
—
—
—
—
—
(@$BFD2,3)
ROM I.D. #
ROM I.D. #
ROM I.D. #
ROM I.D. #
ROM I.D. #
ROM I.D. #
Mask Set
$0000
$0000
$0000
$0000
$0000
I.D.
—
—
—
—
—
Table 2. Summary of Boot-ROM-Related Features
(@$BFD4,5)
MCU Type
Mask set #
Mask set #
Mask set #
Mask set #
$E2E2
$E25C
$E9E9
$E9E9
$E9E9
$E95C
$11D3
$71D3
$71E9
$F1F1
$044B
$744B
I.D.
Security Download
Yes
Yes
Yes
—
—
—
—
—
—
—
—
—
—
—
—
—
Length
0–1024
0–192
0–192
0–512
0–512
0–512
0–512
0–512
0–768
0–768
256
256
256
256
256
256
$F000–EPROM
BRK or $00
$F000–ROM
JMP on
$B600
$B600
$B600
$B600
$B600
$B600
$B600
$B600
$B600
$B600
$B600
$FE00
$0D80
$0D80
(1)
to RAM
$0000
$0000
$0000
$0000
$0000
$0000
JMP
—
—
—
—
—
—
—
—
—
—
(2)
$0000–1FF
$0000–1FF
$0000–1FF
$0000–1FF
$0000–1FF
$0000–3FF
$0080–37F
$0080–37F
$0000–FF
$0000–FF
$0000–FF
$0000–FF
$0040–FF
$0040–FF
$0000–FF
$0000–FF
Location
Default
RAM
and UPLOAD
PROGRAM
Utility
Yes
Yes
Yes
—
—
—
—
—
—
—
—
—
—
—
—
—
(3)
(4)
DD
Notes
(6), (7)
(6), (8)
(6), (8)
will
(5)
(5)
(5)
(5)
(6)
(6)
(5)
(5)
(5)
(5)
(5)
(5)