MC68HC11E1CFN3R2 Freescale Semiconductor, MC68HC11E1CFN3R2 Datasheet - Page 46

MC68HC11E1CFN3R2

Manufacturer Part Number
MC68HC11E1CFN3R2
Description
Manufacturer
Freescale Semiconductor
Datasheet

Specifications of MC68HC11E1CFN3R2

Cpu Family
HC11
Device Core Size
8b
Frequency (max)
3MHz
Interface Type
SCI/SPI
Program Memory Type
ROMLess
Program Memory Size
Not Required
Total Internal Ram Size
512Byte
# I/os (max)
38
Number Of Timers - General Purpose
8
Operating Supply Voltage (typ)
3.3/5V
Operating Supply Voltage (max)
5.5V
Operating Supply Voltage (min)
3V
On-chip Adc
8-chx8-bit
Instruction Set Architecture
CISC
Operating Temp Range
-40C to 85C
Operating Temperature Classification
Industrial
Mounting
Surface Mount
Pin Count
52
Package Type
PLCC
Lead Free Status / Rohs Status
Not Compliant
Operating Modes and On-Chip Memory
2.3.3.3 System Configuration Options Register
The 8-bit, special-purpose system configuration options register (OPTION) sets internal system
configuration options during initialization. The time protected control bits, IRQE, DLY, and CR[1:0], can
be written only once after a reset and then they become read-only. This minimizes the possibility of any
accidental changes to the system configuration.
ADPU — Analog-to-Digital Converter Power-Up Bit
CSEL — Clock Select Bit
46
Refer to
Selects alternate clock source for on-chip EEPROM charge pump. Refer to
CONFIG Programming and Erasure
CSEL also selects the clock source for the A/D converter, a function discussed in
Analog-to-Digital (A/D)
Chapter 3 Analog-to-Digital (A/D)
1. Can be written only once in first 64 cycles out of reset in normal modes or at any time during
Address: $1039
special modes.
Reset:
Read:
Write:
Figure 2-13. System Configuration Options Register (OPTION)
RAM[3:0]
Table 2-4. RAM Mapping
0000
0001
0010
0011
0100
0101
0110
0111
1000
1001
1010
1011
1100
1101
1110
1111
ADPU
Bit 7
0
Converter.
= Unimplemented
CSEL
6
0
$C000–$CxFF
$D000–$DxFF
$A000–$AxFF
$B000–$BxFF
$E000–$ExFF
$F000–$FxFF
M68HC11E Family Data Sheet, Rev. 5.1
$0000–$0xFF
$1000–$1xFF
$2000–$2xFF
$3000–$3xFF
$4000–$4xFF
$5000–$5xFF
$6000–$6xFF
$7000–$7xFF
$8000–$8xFF
$9000–$9xFF
Address
for more information on EEPROM use.
IRQE
5
0
(1)
Converter.
DLY
4
1
(1)
Table 2-5. Register Mapping
REG[3:0]
0000
0001
0010
0011
0100
0101
0110
0111
1000
1001
1010
1011
1100
1101
1110
1111
CME
3
0
2
0
$C000–$C03F
$D000–$D03F
$A000–$A03F
$B000–$B03F
$E000–$E03F
$F000–$F03F
$0000–$003F
$1000–$103F
$2000–$203F
$3000–$303F
$4000–$403F
$5000–$503F
$6000–$603F
$7000–$703F
$8000–$803F
$9000–$903F
Address
CR1
2.5.1 EEPROM and
1
0
(1)
Freescale Semiconductor
Chapter 3
CR0
Bit 0
0
(1)

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