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CY62148VLL-70SI
CY62148VLL-70SI | |
|---|---|
| Manufacturer Part Number | CY62148VLL-70SI |
| Manufacturer | Cypress Semiconductor Corp |
| CY62148VLL-70SI datasheets |
|
Availability: In stock
International delivery:
Warranty: 60 days
×
- We provide standard 60-days warranty for all parts. If warranty differs we always mention it beforehand. In case of return we cover shipping costs.
- If you still have any questions - please contact us
×
Shipping terms
- Standard delivery time differs from 5-8 business days if the supplier is a local one to 12-14 days if the suplier is from overseas. If delivery time differs it's always mentioned in our quotation.
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Payment terms
- For new client payment term is payment in advance. At this moment we accept 3 payment methods: wire transfer, PayPal and Western Union. Credit card payment is under constrution and will be introduced soon. Escrow service is acceptable. Net terms for regular customers is not a problem. Working with us is totally safe for you.
- If you still have any questions - please contact us
Specifications of CY62148VLL-70SI | |||
|---|---|---|---|
| Density | 4Mb | Access Time (max) | 70ns |
| Package Type | SOIC | Operating Temp Range | -40C to 85C |
| Supply Current | 15mA | Operating Supply Voltage (min) | 2.7V |
| Operating Supply Voltage (max) | 3.6V | Operating Temperature Classification | Industrial |
| Mounting | Surface Mount | Pin Count | 32 |
| Word Size | 8b | Lead Free Status / Rohs Status | Not Compliant |
PrevNext
[4]
Capacitance
Parameter
Description
C
Input Capacitance
IN
C
Output Capacitance
OUT
Thermal Resistance
Parameter
Description
[4]
Thermal Resistance
JA
(Junction to Ambient)
[4]
Thermal Resistance
JC
(Junction to Case)
AC Test Loads and Waveforms
R1
V
CC
OUTPUT
50 pF
INCLUDING
JIG AND
SCOPE
Parameters
R1
R2
R
TH
V
TH
Data Retention Characteristics
Parameter
Description
V
V
for Data Retention
DR
CC
I
Data Retention Current
CCDR
[4]
t
Chip Deselect to Data
CDR
Retention Time
[5]
t
Operation Recovery Time
R
Data Retention Waveform
V
CC
CE
Notes:
4.
Tested initially and after any design or process changes that may affect these parameters.
5.
Full-device AC operation requires linear V
ramp from V
CC
Document #: 38-05070 Rev. *A
Test Conditions
T
= 25°C, f = 1 MHz,
A
V
= 3.0V
CC
Test Conditions
Still Air, soldered on a 4.25 x 1.125 inch, 4-layer
printed circuit board
ALL INPUT PULSES
V
TYP
CC
10%
R2
GND
Rise time: 1V/ns
Equivalent to:
THÉ VENIN EQUIVALENT
R
th
OUTPUT
3.0V
1105
1550
645
1.75V
(Over the Operating Range)
Conditions
V
= 1.0V, CE > V
0.3V, V
> V
0.3V or V
CC
CC
IN
CC
0.3V; No input may exceed V
+ 0.3V
CC
DATA RETENTION MODE
1.0V
V
> 1.0 V
DR
t
CDR
to V
> 10 s or stable at V
DR
CC(min.)
CC(min.)
CY62148V MoBL
Max.
Unit
6
pF
8
pF
Others
BGA
Units
TBD
TBD
C/W
TBD
TBD
C/W
90%
90%
10%
Fall time: 1V/ns
V
th
Unit
Ohms
Ohms
Ohms
Volts
[3]
Min.
Typ.
Max.
Unit
1.0
3.6
<
0.2
5.5
IN
0
t
RC
1.0V
t
R
10 s.
Page 3 of 9
V
A
ns
ns
[+] Feedback
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