CY7C1006-12VC Cypress Semiconductor Corp, CY7C1006-12VC Datasheet

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CY7C1006-12VC

Manufacturer Part Number
CY7C1006-12VC
Description
Manufacturer
Cypress Semiconductor Corp
Datasheet

Specifications of CY7C1006-12VC

Density
1Mb
Access Time (max)
12ns
Operating Supply Voltage (typ)
5V
Package Type
SOJ
Operating Temp Range
0C to 70C
Supply Current
165mA
Operating Supply Voltage (min)
4.5V
Operating Supply Voltage (max)
5.5V
Operating Temperature Classification
Commercial
Mounting
Surface Mount
Pin Count
28
Word Size
4b
Lead Free Status / Rohs Status
Not Compliant
Features
Functional Description
The CY7C106 and CY7C1006 are high-performance CMOS
static RAMs organized as 262,144 words by 4 bits. Easy mem-
ory expansion is provided by an active LOW chip enable (CE),
Selection Guide
Cypress Semiconductor Corporation
• High speed
• CMOS for optimum speed/power
• Low active power
• Low standby power
• 2.0V data retention (optional)
• Automatic power-down when deselected
• TTL-compatible inputs and outputs
Maximum Access Time (ns)
Maximum Operating
Current (mA)
Maximum Standby
Current (mA)
Logic Block Diagram
— t
— 910 mW
— 275 mW
— 100 W
A
A
A
A
A
A
A
A
A
AA
1
2
3
4
5
6
7
8
9
= 12 ns
INPUT BUFFER
512 x 512 x 4
DECODER
ARRAY
COLUMN
7C1006-12
7C106-12
165
12
50
POWER
DOWN
3901 North First Street
7C1006-15
7C106-15
155
15
30
an active LOW output enable (OE), and three-state drivers.
These devices have an automatic power-down feature that re-
duces power consumption by more than 65% when the devic-
es are deselected.
Writing to the devices is accomplished by taking chip enable
(CE) and write enable (WE) inputs LOW. Data on the four I/O
pins (I/O
fied on the address pins (A
Reading from the devices is accomplished by taking chip en-
able (CE) and output enable (OE) LOW while forcing write en-
able (WE) HIGH. Under these conditions, the contents of the
memory location specified by the address pins will appear on
the four I/O pins.
The four input/output pins (I/O
high-impedance state when the devices are deselected (CE
HIGH), the outputs are disabled (OE HIGH), or during a write
operation (CE and WE LOW).
The CY7C106 is available in a standard 400-mil-wide SOJ; the
CY7C1006 is available in a standard 300-mil-wide SOJ.
C106–1
I/O
I/O
I/O
I/O
WE
CE
OE
3
2
1
0
7C1006-20
7C106-20
0
through I/O
145
20
30
San Jose
256K x 4 Static RAM
3
Pin Configuration
GND
) is then written into the location speci-
A
OE
CE
A
A
A
A
A
A
A
A
A
A
10
0
1
2
3
4
5
6
7
8
9
7C1006-25
0
7C106-25
through A
CA 95134
13
14
1
2
3
4
5
6
7
8
9
10
11
12
Top View
0
130
25
30
SOJ
through I/O
28
27
26
25
24
23
22
21
20
19
18
17
16
15
17
C106–2
).
I/O
WE
V
A
A
A
A
A
A
A
NC
I/O
I/O
I/O
CC
17
16
15
14
13
12
11
CY7C1006
1
3
2
0
3
CY7C106
) are placed in a
7C106-35
408-943-2600
July 9, 1998
125
35
25

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CY7C1006-12VC Summary of contents

Page 1

... I/O pins. The four input/output pins (I/O high-impedance state when the devices are deselected (CE HIGH), the outputs are disabled (OE HIGH), or during a write operation (CE and WE LOW). The CY7C106 is available in a standard 400-mil-wide SOJ; the CY7C1006 is available in a standard 300-mil-wide SOJ. I/O 3 I/O 2 I/O ...

Page 2

... MAX RC Max > > < MAX Max Com’ > V – 0.3V > V – 0. < 0.3V, f CY7C106 CY7C1006 Ambient [2] Temperature + 10% 7C106-15 7C106-20 7C1006-15 7C1006-20 Max. Min. Max. Min. Max. Unit 2.4 2.4 0.4 0.4 0.4 V 2 +0.3 +0.3 +0.3 0.8 –0.3 0.8 – ...

Page 3

... V – 0. < 0.3V, f=0 IN Test Conditions MHz 5. 480 5V 3.0V R2 GND 5 pF 255 INCLUDING JIG AND SCOPE (b) C106–3 3 CY7C106 CY7C1006 7C106-25 7C1006-25 7C106-35 Min. Max. Min. Max. 2.4 2.4 0.4 0.4 2 0 –0.3 0.8 –0.3 0.8 –1 +1 –1 +1 –5 +5 – ...

Page 4

... Min. Max. Min. Max. Min less than less than t , and t HZCE LZCE HZOE LZOE HZWE and t HZWE 4 CY7C106 CY7C1006 7C106-25 7C1006-25 7C106-35 Max. Min. Max. Min. Max. Unit less than t for any given device. LZWE . ...

Page 5

... Over the Operating Range (L Version Only) Conditions > V – 0.3V > V – 0. < 0.3V IN DATA RETENTION MODE 4.5V V > CDR OHA DOE DATA VALID 50 CY7C106 CY7C1006 [10] Min. Max. 2.0 = 2.0V 4. C106–5 DATA VALID C106–6 t HZOE t HZCE HIGH IMPEDANCE t PD 50% C106–7 Unit ICC ISB ...

Page 6

... Write Cycle No. 2 (WE Controlled, OE HIGH During Write) ADDRESS DATA I/O t HZOE Notes: 14 goes HIGH simultaneously with WE going HIGH, the output remains in a high-impedance state. 15. Data I/O is high impedance SCE PWE t SD DATA VALID [14, 15 SCE PWE t SD DATA VALID 6 CY7C106 CY7C1006 C106A– C106–9 ...

Page 7

... V28 28-Lead (400-Mil) Molded SOJ V21 28-Lead (300-Mil) Molded SOJ V28 28-Lead (400-Mil) Molded SOJ V21 28-Lead (300-Mil) Molded SOJ V28 28-Lead (400-Mil) Molded SOJ V21 28-Lead (300-Mil) Molded SOJ V28 28-Lead (400-Mil) Molded SOJ 7 CY7C106 CY7C1006 LZWE C106–10 Power ) ...

Page 8

... The inclusion of Cypress Semiconductor products in life-support systems application implies that the manufacturer assumes all risk of such use and in doing so indemnifies Cypress Semiconductor against all charges. 28-Lead (300-Mil) Molded SOJ V21 28-Lead (400-Mil) Molded SOJ V28 CY7C106 CY7C1006 51-85031-B 51-85032-A ...

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